From 6b81e087c239e74a84405805bc8a3f6f3c1798a4 Mon Sep 17 00:00:00 2001 From: Hoa Nguyen Date: Thu, 28 Feb 2019 18:26:07 -0800 Subject: [PATCH] tests: add riscv to cpu tests Change-Id: Id8e767afbb74f79b980d8160eefc13e7f529f1c3 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/16889 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- tests/gem5/cpu_tests/test.py | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/gem5/cpu_tests/test.py b/tests/gem5/cpu_tests/test.py index 6fb68a9db..f34b23d07 100644 --- a/tests/gem5/cpu_tests/test.py +++ b/tests/gem5/cpu_tests/test.py @@ -38,6 +38,7 @@ workloads = ('Bubblesort','FloatMM') valid_isas = { 'x86': ('AtomicSimpleCPU', 'TimingSimpleCPU', 'DerivO3CPU'), 'arm': ('AtomicSimpleCPU', 'TimingSimpleCPU', 'MinorCPU', 'DerivO3CPU'), + 'riscv': ('AtomicSimpleCPU', 'TimingSimpleCPU', 'MinorCPU', 'DerivO3CPU'), } -- 2.30.2