From 6b8de6ab45b99e8d2d484d7f45de6a8f912735c0 Mon Sep 17 00:00:00 2001
From: whitequark <cz@m-labs.hk>
Date: Sat, 26 Jan 2019 23:25:54 +0000
Subject: [PATCH] back.rtlil: accept ast.Const as cell parameter.

---
 nmigen/back/rtlil.py | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/nmigen/back/rtlil.py b/nmigen/back/rtlil.py
index f85fcea..6fcd50b 100644
--- a/nmigen/back/rtlil.py
+++ b/nmigen/back/rtlil.py
@@ -114,9 +114,14 @@ class _ModuleBuilder(_Namer, _Bufferer):
             if isinstance(value, str):
                 self._append("    parameter \\{} \"{}\"\n",
                              param, value.translate(self._escape_map))
-            else:
+            elif isinstance(value, int):
                 self._append("    parameter \\{} {:d}\n",
                              param, value)
+            elif isinstance(value, ast.Const):
+                self._append("    parameter \\{} {}'{:b}\n",
+                             param, len(value), value.value)
+            else:
+                assert False
         for port, wire in ports.items():
             self._append("    connect {} {}\n", port, wire)
         self._append("  end\n")
-- 
2.30.2