From 6ba0d4bd0d8a7d4f45e3276c891aa64e5320512b Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sat, 27 Jul 2013 22:25:07 +0200 Subject: [PATCH] bus/wishbone: configurable data width --- migen/bus/wishbone.py | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-) diff --git a/migen/bus/wishbone.py b/migen/bus/wishbone.py index 7fc1b521..d7cd4001 100644 --- a/migen/bus/wishbone.py +++ b/migen/bus/wishbone.py @@ -6,22 +6,23 @@ from migen.bus.transactions import * from migen.sim.generic import Proxy _layout = [ - ("adr", 30, DIR_M_TO_S), - ("dat_w", 32, DIR_M_TO_S), - ("dat_r", 32, DIR_S_TO_M), - ("sel", 4, DIR_M_TO_S), - ("cyc", 1, DIR_M_TO_S), - ("stb", 1, DIR_M_TO_S), - ("ack", 1, DIR_S_TO_M), - ("we", 1, DIR_M_TO_S), - ("cti", 3, DIR_M_TO_S), - ("bte", 2, DIR_M_TO_S), - ("err", 1, DIR_S_TO_M) + ("adr", 30, DIR_M_TO_S), + ("dat_w", "data_width", DIR_M_TO_S), + ("dat_r", "data_width", DIR_S_TO_M), + ("sel", "sel_width", DIR_M_TO_S), + ("cyc", 1, DIR_M_TO_S), + ("stb", 1, DIR_M_TO_S), + ("ack", 1, DIR_S_TO_M), + ("we", 1, DIR_M_TO_S), + ("cti", 3, DIR_M_TO_S), + ("bte", 2, DIR_M_TO_S), + ("err", 1, DIR_S_TO_M) ] class Interface(Record): - def __init__(self): - Record.__init__(self, _layout) + def __init__(self, data_width=32): + Record.__init__(self, _layout, data_width=data_width, + sel_width=data_width//8) class InterconnectPointToPoint(Module): def __init__(self, master, slave): -- 2.30.2