From 6c3a8bf4171173c87d694d6721464c8e2f6423a6 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 12 Jun 2020 21:47:06 +1000 Subject: [PATCH] bram: Remove combinational loop on stall It hurts timing and is pointless Signed-off-by: Benjamin Herrenschmidt --- soc.vhdl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/soc.vhdl b/soc.vhdl index 23d3885..7c8e825 100644 --- a/soc.vhdl +++ b/soc.vhdl @@ -609,7 +609,7 @@ begin no_bram: if MEMORY_SIZE = 0 generate wb_bram_out.ack <= wb_bram_in.cyc and wb_bram_in.stb; wb_bram_out.dat <= x"FFFFFFFFFFFFFFFF"; - wb_bram_out.stall <= wb_bram_in.cyc and not wb_bram_out.ack; + wb_bram_out.stall <= not wb_bram_out.ack; end generate; -- DMI(debug bus) <-> JTAG bridge -- 2.30.2