From 6c69b4019470916ca38a8159ac628700cb12d869 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 26 Dec 2020 18:00:42 +0000 Subject: [PATCH] --- openpower/sv/av_opcodes.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn index 0318dc616..ce40f4d95 100644 --- a/openpower/sv/av_opcodes.mdwn +++ b/openpower/sv/av_opcodes.mdwn @@ -97,7 +97,7 @@ See [[sv/mv.vec]] and [[sv/mv.swizzle]] The spec says the max relative inaccuracy is 1/4096. -*These could be done by assigning meaning to the "sat mode" SVP64 bits in a FP context. 0b00 is IEEE754 FP, 0b01 is 2^12 accuracy for FP32. These can be applied to standard scalar FP ops* +*In conjunction with the FPSPR "accuracy" bit These could be done by assigning meaning to the "sat mode" SVP64 bits in a FP context. 0b00 is IEEE754 FP, 0b01 is 2^12 accuracy for FP32. These can be applied to standard scalar FP ops* ## vec_madd(s) - FMA, multiply-add, optionally saturated -- 2.30.2