From 6c965e11dc7950207f7cc0baff0ff273c33f4ecc Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Fri, 20 Mar 2015 23:11:49 -0700 Subject: [PATCH] For misaligned fetch, set mepc = addr of branch/jump --- riscv/decode.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/riscv/decode.h b/riscv/decode.h index 2fdb042..4ad4549 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -153,7 +153,11 @@ private: #define sext_xlen(x) (((sreg_t)(x) << (64-xlen)) >> (64-xlen)) #define zext_xlen(x) (((reg_t)(x) << (64-xlen)) >> (64-xlen)) -#define set_pc(x) (npc = sext_xlen(x)) +#define set_pc(x) \ + do { if ((x) & 3 /* For now... */) \ + throw trap_instruction_address_misaligned(x); \ + npc = sext_xlen(x); \ + } while(0) #define validate_csr(which, write) ({ \ unsigned my_priv = get_field(STATE.mstatus, MSTATUS_PRV); \ -- 2.30.2