From 6cc1573923754ecb406d03ab4d807f928737c294 Mon Sep 17 00:00:00 2001 From: Stephen Hines Date: Wed, 6 Feb 2008 16:32:40 -0500 Subject: [PATCH] Make the Event::description() a const function --HG-- extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0 --- src/arch/mips/regfile/misc_regfile.cc | 2 +- src/arch/mips/regfile/misc_regfile.hh | 2 +- src/cpu/base.cc | 2 +- src/cpu/base.hh | 2 +- src/cpu/memtest/memtest.hh | 2 +- src/cpu/o3/commit.hh | 2 +- src/cpu/o3/commit_impl.hh | 2 +- src/cpu/o3/cpu.cc | 6 +++--- src/cpu/o3/cpu.hh | 6 +++--- src/cpu/o3/inst_queue.hh | 2 +- src/cpu/o3/inst_queue_impl.hh | 2 +- src/cpu/o3/lsq_unit.hh | 2 +- src/cpu/o3/lsq_unit_impl.hh | 2 +- src/cpu/ozone/back_end.hh | 4 ++-- src/cpu/ozone/back_end_impl.hh | 4 ++-- src/cpu/ozone/cpu.hh | 2 +- src/cpu/ozone/cpu_impl.hh | 2 +- src/cpu/ozone/inorder_back_end.hh | 2 +- src/cpu/ozone/inorder_back_end_impl.hh | 2 +- src/cpu/ozone/inst_queue.hh | 2 +- src/cpu/ozone/inst_queue_impl.hh | 2 +- src/cpu/ozone/lsq_unit.hh | 2 +- src/cpu/ozone/lsq_unit_impl.hh | 2 +- src/cpu/ozone/lw_back_end.hh | 2 +- src/cpu/ozone/lw_back_end_impl.hh | 2 +- src/cpu/ozone/lw_lsq.hh | 2 +- src/cpu/ozone/lw_lsq_impl.hh | 2 +- src/cpu/quiesce_event.cc | 2 +- src/cpu/quiesce_event.hh | 2 +- src/cpu/simple/atomic.cc | 2 +- src/cpu/simple/atomic.hh | 2 +- src/cpu/simple/timing.cc | 2 +- src/cpu/simple/timing.hh | 8 ++++---- src/cpu/trace/opt_cpu.cc | 2 +- src/cpu/trace/opt_cpu.hh | 2 +- src/cpu/trace/trace_cpu.cc | 4 ++-- src/cpu/trace/trace_cpu.hh | 4 ++-- src/dev/alpha/tsunami_io.cc | 4 ++-- src/dev/alpha/tsunami_io.hh | 4 ++-- src/dev/etherbus.hh | 3 ++- src/dev/ethertap.hh | 3 ++- src/dev/mips/malta_io.cc | 4 ++-- src/dev/mips/malta_io.hh | 4 ++-- src/dev/uart8250.cc | 2 +- src/dev/uart8250.hh | 2 +- src/mem/bridge.hh | 2 +- src/mem/bus.cc | 2 +- src/mem/bus.hh | 2 +- src/sim/debug.cc | 4 ++-- src/sim/eventq.cc | 2 +- src/sim/eventq.hh | 4 ++-- src/sim/sim_events.cc | 6 +++--- src/sim/sim_events.hh | 6 +++--- 53 files changed, 76 insertions(+), 74 deletions(-) diff --git a/src/arch/mips/regfile/misc_regfile.cc b/src/arch/mips/regfile/misc_regfile.cc index 5e4c803fc..dc6ae0baf 100755 --- a/src/arch/mips/regfile/misc_regfile.cc +++ b/src/arch/mips/regfile/misc_regfile.cc @@ -577,7 +577,7 @@ MiscRegFile::CP0Event::process() } const char * -MiscRegFile::CP0Event::description() +MiscRegFile::CP0Event::description() const { return "Coprocessor-0 event"; } diff --git a/src/arch/mips/regfile/misc_regfile.hh b/src/arch/mips/regfile/misc_regfile.hh index a6f1a15c6..5f19579b3 100644 --- a/src/arch/mips/regfile/misc_regfile.hh +++ b/src/arch/mips/regfile/misc_regfile.hh @@ -139,7 +139,7 @@ namespace MipsISA virtual void process(); /** Returns the description of this event. */ - const char *description(); + const char *description() const; /** Schedule This Event */ void scheduleEvent(int delay); diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 677152ce8..23195f720 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -88,7 +88,7 @@ CPUProgressEvent::process() } const char * -CPUProgressEvent::description() +CPUProgressEvent::description() const { return "CPU Progress"; } diff --git a/src/cpu/base.hh b/src/cpu/base.hh index e0d2340e9..bdc7d7c8b 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -68,7 +68,7 @@ class CPUProgressEvent : public Event void process(); - virtual const char *description(); + virtual const char *description() const; }; class BaseCPU : public MemObject diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh index 1a330319f..ac2d0a058 100644 --- a/src/cpu/memtest/memtest.hh +++ b/src/cpu/memtest/memtest.hh @@ -77,7 +77,7 @@ class MemTest : public MemObject TickEvent(MemTest *c) : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {} void process() {cpu->tick();} - virtual const char *description() { return "MemTest tick"; } + virtual const char *description() const { return "MemTest tick"; } }; TickEvent tickEvent; diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index 27bdd20c5..80e42fa8b 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -97,7 +97,7 @@ class DefaultCommit TrapEvent(DefaultCommit *_commit, unsigned _tid); void process(); - const char *description(); + const char *description() const; }; /** Overall commit status. Used to determine if the CPU can deschedule diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 89df257e9..ee0f2bb59 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -65,7 +65,7 @@ DefaultCommit::TrapEvent::process() template const char * -DefaultCommit::TrapEvent::description() +DefaultCommit::TrapEvent::description() const { return "Trap"; } diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index 5908062aa..8eb17d23b 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -80,7 +80,7 @@ FullO3CPU::TickEvent::process() template const char * -FullO3CPU::TickEvent::description() +FullO3CPU::TickEvent::description() const { return "FullO3CPU tick"; } @@ -109,7 +109,7 @@ FullO3CPU::ActivateThreadEvent::process() template const char * -FullO3CPU::ActivateThreadEvent::description() +FullO3CPU::ActivateThreadEvent::description() const { return "FullO3CPU \"Activate Thread\""; } @@ -141,7 +141,7 @@ FullO3CPU::DeallocateContextEvent::process() template const char * -FullO3CPU::DeallocateContextEvent::description() +FullO3CPU::DeallocateContextEvent::description() const { return "FullO3CPU \"Deallocate Context\""; } diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 162e377e1..e902968c1 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -136,7 +136,7 @@ class FullO3CPU : public BaseO3CPU /** Processes a tick event, calling tick() on the CPU. */ void process(); /** Returns the description of the tick event. */ - const char *description(); + const char *description() const; }; /** The tick event used for scheduling CPU ticks. */ @@ -178,7 +178,7 @@ class FullO3CPU : public BaseO3CPU void process(); /** Returns the description of the event. */ - const char *description(); + const char *description() const; }; /** Schedule thread to activate , regardless of its current state. */ @@ -229,7 +229,7 @@ class FullO3CPU : public BaseO3CPU void setRemove(bool _remove) { remove = _remove; } /** Returns the description of the event. */ - const char *description(); + const char *description() const; }; /** Schedule cpu to deallocate thread context.*/ diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh index 9d7c457ca..d0f503977 100644 --- a/src/cpu/o3/inst_queue.hh +++ b/src/cpu/o3/inst_queue.hh @@ -105,7 +105,7 @@ class InstructionQueue InstructionQueue *iq_ptr); virtual void process(); - virtual const char *description(); + virtual const char *description() const; void setFreeFU() { freeFU = true; } }; diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index b14a63a17..fb06f20df 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -58,7 +58,7 @@ InstructionQueue::FUCompletion::process() template const char * -InstructionQueue::FUCompletion::description() +InstructionQueue::FUCompletion::description() const { return "Functional unit completion"; } diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index be9224099..128a71dbc 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -273,7 +273,7 @@ class LSQUnit { void process(); /** Returns the description of this event. */ - const char *description(); + const char *description() const; private: /** Instruction whose results are being written back. */ diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 71b416c9c..e6ff5e931 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -67,7 +67,7 @@ LSQUnit::WritebackEvent::process() template const char * -LSQUnit::WritebackEvent::description() +LSQUnit::WritebackEvent::description() const { return "Store writeback"; } diff --git a/src/cpu/ozone/back_end.hh b/src/cpu/ozone/back_end.hh index 992f55c6e..4cdc86c3c 100644 --- a/src/cpu/ozone/back_end.hh +++ b/src/cpu/ozone/back_end.hh @@ -186,7 +186,7 @@ class BackEnd /** Processes writeback event. */ virtual void process(); /** Returns the description of the writeback event. */ - virtual const char *description(); + virtual const char *description() const; }; BackEnd(Params *params); @@ -309,7 +309,7 @@ class BackEnd DCacheCompletionEvent(BackEnd *_be); virtual void process(); - virtual const char *description(); + virtual const char *description() const; }; friend class DCacheCompletionEvent; diff --git a/src/cpu/ozone/back_end_impl.hh b/src/cpu/ozone/back_end_impl.hh index 27146ecf0..415407c52 100644 --- a/src/cpu/ozone/back_end_impl.hh +++ b/src/cpu/ozone/back_end_impl.hh @@ -581,7 +581,7 @@ BackEnd::LdWritebackEvent::process() template const char * -BackEnd::LdWritebackEvent::description() +BackEnd::LdWritebackEvent::description() const { return "Load writeback"; } @@ -601,7 +601,7 @@ BackEnd::DCacheCompletionEvent::process() template const char * -BackEnd::DCacheCompletionEvent::description() +BackEnd::DCacheCompletionEvent::description() const { return "Cache completion"; } diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index 036db1351..61abae807 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -306,7 +306,7 @@ class OzoneCPU : public BaseCPU TickEvent(OzoneCPU *c, int w); void process(); - const char *description(); + const char *description() const; }; TickEvent tickEvent; diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index 5080c54f6..0c7105382 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -82,7 +82,7 @@ OzoneCPU::TickEvent::process() template const char * -OzoneCPU::TickEvent::description() +OzoneCPU::TickEvent::description() const { return "OzoneCPU tick"; } diff --git a/src/cpu/ozone/inorder_back_end.hh b/src/cpu/ozone/inorder_back_end.hh index 4fd8e02f8..aef29b1e2 100644 --- a/src/cpu/ozone/inorder_back_end.hh +++ b/src/cpu/ozone/inorder_back_end.hh @@ -161,7 +161,7 @@ class InorderBackEnd DCacheCompletionEvent(InorderBackEnd *_be); virtual void process(); - virtual const char *description(); + virtual const char *description() const; DynInstPtr inst; }; diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh index c57fa0200..cf8634a42 100644 --- a/src/cpu/ozone/inorder_back_end_impl.hh +++ b/src/cpu/ozone/inorder_back_end_impl.hh @@ -538,7 +538,7 @@ InorderBackEnd::DCacheCompletionEvent::process() template const char * -InorderBackEnd::DCacheCompletionEvent::description() +InorderBackEnd::DCacheCompletionEvent::description() const { return "DCache completion"; } diff --git a/src/cpu/ozone/inst_queue.hh b/src/cpu/ozone/inst_queue.hh index 0158fd2d2..a11d5204b 100644 --- a/src/cpu/ozone/inst_queue.hh +++ b/src/cpu/ozone/inst_queue.hh @@ -99,7 +99,7 @@ class InstQueue InstQueue *iq_ptr); virtual void process(); - virtual const char *description(); + virtual const char *description() const; }; #endif /** Constructs an IQ. */ diff --git a/src/cpu/ozone/inst_queue_impl.hh b/src/cpu/ozone/inst_queue_impl.hh index 461c7eb0f..3c3084757 100644 --- a/src/cpu/ozone/inst_queue_impl.hh +++ b/src/cpu/ozone/inst_queue_impl.hh @@ -62,7 +62,7 @@ InstQueue::FUCompletion::process() template const char * -InstQueue::FUCompletion::description() +InstQueue::FUCompletion::description() const { return "Functional unit completion"; } diff --git a/src/cpu/ozone/lsq_unit.hh b/src/cpu/ozone/lsq_unit.hh index 056c79521..981682c26 100644 --- a/src/cpu/ozone/lsq_unit.hh +++ b/src/cpu/ozone/lsq_unit.hh @@ -80,7 +80,7 @@ class OzoneLSQ { void process(); /** Returns the description of this event. */ - const char *description(); + const char *description() const; private: /** The store index of the store being written back. */ diff --git a/src/cpu/ozone/lsq_unit_impl.hh b/src/cpu/ozone/lsq_unit_impl.hh index e08e54835..84a90eede 100644 --- a/src/cpu/ozone/lsq_unit_impl.hh +++ b/src/cpu/ozone/lsq_unit_impl.hh @@ -60,7 +60,7 @@ OzoneLSQ::StoreCompletionEvent::process() template const char * -OzoneLSQ::StoreCompletionEvent::description() +OzoneLSQ::StoreCompletionEvent::description() const { return "LSQ store completion"; } diff --git a/src/cpu/ozone/lw_back_end.hh b/src/cpu/ozone/lw_back_end.hh index 08a6863d0..a335ab7dc 100644 --- a/src/cpu/ozone/lw_back_end.hh +++ b/src/cpu/ozone/lw_back_end.hh @@ -94,7 +94,7 @@ class LWBackEnd TrapEvent(LWBackEnd *_be); void process(); - const char *description(); + const char *description() const; }; LWBackEnd(Params *params); diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh index 42788cee1..a5d79a789 100644 --- a/src/cpu/ozone/lw_back_end_impl.hh +++ b/src/cpu/ozone/lw_back_end_impl.hh @@ -119,7 +119,7 @@ LWBackEnd::TrapEvent::process() template const char * -LWBackEnd::TrapEvent::description() +LWBackEnd::TrapEvent::description() const { return "Trap"; } diff --git a/src/cpu/ozone/lw_lsq.hh b/src/cpu/ozone/lw_lsq.hh index ba40e9ce1..7fc8b6307 100644 --- a/src/cpu/ozone/lw_lsq.hh +++ b/src/cpu/ozone/lw_lsq.hh @@ -329,7 +329,7 @@ class OzoneLWLSQ { void process(); /** Returns the description of this event. */ - const char *description(); + const char *description() const; private: /** Instruction whose results are being written back. */ diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh index 82191312a..00e52e039 100644 --- a/src/cpu/ozone/lw_lsq_impl.hh +++ b/src/cpu/ozone/lw_lsq_impl.hh @@ -55,7 +55,7 @@ OzoneLWLSQ::WritebackEvent::process() template const char * -OzoneLWLSQ::WritebackEvent::description() +OzoneLWLSQ::WritebackEvent::description() const { return "Store writeback"; } diff --git a/src/cpu/quiesce_event.cc b/src/cpu/quiesce_event.cc index 3495a0e52..81384d529 100644 --- a/src/cpu/quiesce_event.cc +++ b/src/cpu/quiesce_event.cc @@ -45,7 +45,7 @@ EndQuiesceEvent::process() } const char* -EndQuiesceEvent::description() +EndQuiesceEvent::description() const { return "End Quiesce"; } diff --git a/src/cpu/quiesce_event.hh b/src/cpu/quiesce_event.hh index 3de40f97e..85c88ab32 100644 --- a/src/cpu/quiesce_event.hh +++ b/src/cpu/quiesce_event.hh @@ -47,7 +47,7 @@ struct EndQuiesceEvent : public Event virtual void process(); /** Event description */ - virtual const char *description(); + virtual const char *description() const; }; #endif // __CPU_QUIESCE_EVENT_HH__ diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index aa548b46f..2254d44d5 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -55,7 +55,7 @@ AtomicSimpleCPU::TickEvent::process() } const char * -AtomicSimpleCPU::TickEvent::description() +AtomicSimpleCPU::TickEvent::description() const { return "AtomicSimpleCPU tick"; } diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index f14dd6f99..19bc0e13b 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -68,7 +68,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU TickEvent(AtomicSimpleCPU *c); void process(); - const char *description(); + const char *description() const; }; TickEvent tickEvent; diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index e1fc6882f..9fe3d2fff 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -822,7 +822,7 @@ TimingSimpleCPU::IprEvent::process() } const char * -TimingSimpleCPU::IprEvent::description() +TimingSimpleCPU::IprEvent::description() const { return "Timing Simple CPU Delay IPR event"; } diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 79fbe0f5f..f8b77604a 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -101,7 +101,7 @@ class TimingSimpleCPU : public BaseSimpleCPU TickEvent(TimingSimpleCPU *_cpu) :Event(&mainEventQueue), cpu(_cpu) {} - const char *description() { return "Timing CPU tick"; } + const char *description() const { return "Timing CPU tick"; } void schedule(PacketPtr _pkt, Tick t); }; @@ -127,7 +127,7 @@ class TimingSimpleCPU : public BaseSimpleCPU ITickEvent(TimingSimpleCPU *_cpu) : TickEvent(_cpu) {} void process(); - const char *description() { return "Timing CPU icache tick"; } + const char *description() const { return "Timing CPU icache tick"; } }; ITickEvent tickEvent; @@ -155,7 +155,7 @@ class TimingSimpleCPU : public BaseSimpleCPU DTickEvent(TimingSimpleCPU *_cpu) : TickEvent(_cpu) {} void process(); - const char *description() { return "Timing CPU dcache tick"; } + const char *description() const { return "Timing CPU dcache tick"; } }; DTickEvent tickEvent; @@ -219,7 +219,7 @@ class TimingSimpleCPU : public BaseSimpleCPU TimingSimpleCPU *cpu; IprEvent(Packet *_pkt, TimingSimpleCPU *_cpu, Tick t); virtual void process(); - virtual const char *description(); + virtual const char *description() const; }; void completeDrain(); diff --git a/src/cpu/trace/opt_cpu.cc b/src/cpu/trace/opt_cpu.cc index 33da3d870..10e71db7b 100644 --- a/src/cpu/trace/opt_cpu.cc +++ b/src/cpu/trace/opt_cpu.cc @@ -204,7 +204,7 @@ OptCPU::TickEvent::process() } const char * -OptCPU::TickEvent::description() +OptCPU::TickEvent::description() const { return "OptCPU tick"; } diff --git a/src/cpu/trace/opt_cpu.hh b/src/cpu/trace/opt_cpu.hh index dfb122319..9d98eebc6 100644 --- a/src/cpu/trace/opt_cpu.hh +++ b/src/cpu/trace/opt_cpu.hh @@ -81,7 +81,7 @@ class OptCPU : public SimObject /** * Return a string description of this event. */ - const char *description(); + const char *description() const; }; TickEvent tickEvent; diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc index d3cf34e9d..ab00b3093 100644 --- a/src/cpu/trace/trace_cpu.cc +++ b/src/cpu/trace/trace_cpu.cc @@ -129,7 +129,7 @@ TraceCompleteEvent::process() } const char * -TraceCompleteEvent::description() +TraceCompleteEvent::description() const { return "trace access complete"; } @@ -146,7 +146,7 @@ TraceCPU::TickEvent::process() } const char * -TraceCPU::TickEvent::description() +TraceCPU::TickEvent::description() const { return "TraceCPU tick"; } diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh index b88c7072e..a1ae4dc80 100644 --- a/src/cpu/trace/trace_cpu.hh +++ b/src/cpu/trace/trace_cpu.hh @@ -93,7 +93,7 @@ class TraceCPU : public SimObject /** * Return a string description of this event. */ - const char *description(); + const char *description() const; }; TickEvent tickEvent; @@ -135,7 +135,7 @@ class TraceCompleteEvent : public Event void process(); - virtual const char *description(); + virtual const char *description() const; }; #endif // __CPU_TRACE_TRACE_CPU_HH__ diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc index e1ca1c84c..710aca48d 100644 --- a/src/dev/alpha/tsunami_io.cc +++ b/src/dev/alpha/tsunami_io.cc @@ -205,7 +205,7 @@ TsunamiIO::RTC::RTCEvent::process() } const char * -TsunamiIO::RTC::RTCEvent::description() +TsunamiIO::RTC::RTCEvent::description() const { return "tsunami RTC interrupt"; } @@ -429,7 +429,7 @@ TsunamiIO::PITimer::Counter::CounterEvent::process() } const char * -TsunamiIO::PITimer::Counter::CounterEvent::description() +TsunamiIO::PITimer::Counter::CounterEvent::description() const { return "tsunami 8254 Interval timer"; } diff --git a/src/dev/alpha/tsunami_io.hh b/src/dev/alpha/tsunami_io.hh index 5083604f8..05c4ee910 100644 --- a/src/dev/alpha/tsunami_io.hh +++ b/src/dev/alpha/tsunami_io.hh @@ -73,7 +73,7 @@ class TsunamiIO : public BasicPioDevice virtual void process(); /** Event description */ - virtual const char *description(); + virtual const char *description() const; }; private: @@ -161,7 +161,7 @@ class TsunamiIO : public BasicPioDevice virtual void process(); /** Event description */ - virtual const char *description(); + virtual const char *description() const; friend class Counter; }; diff --git a/src/dev/etherbus.hh b/src/dev/etherbus.hh index 4deb7fccc..624ceb81a 100644 --- a/src/dev/etherbus.hh +++ b/src/dev/etherbus.hh @@ -62,7 +62,8 @@ class EtherBus : public EtherObject DoneEvent(EventQueue *q, EtherBus *b) : Event(q), bus(b) {} virtual void process() { bus->txDone(); } - virtual const char *description() { return "ethernet bus completion"; } + virtual const char *description() const + { return "ethernet bus completion"; } }; DoneEvent event; diff --git a/src/dev/ethertap.hh b/src/dev/ethertap.hh index 5c24be460..be3d73a24 100644 --- a/src/dev/ethertap.hh +++ b/src/dev/ethertap.hh @@ -93,7 +93,8 @@ class EtherTap : public EtherObject TxEvent(EtherTap *_tap) : Event(&mainEventQueue), tap(_tap) {} void process() { tap->retransmit(); } - virtual const char *description() { return "EtherTap retransmit"; } + virtual const char *description() const + { return "EtherTap retransmit"; } }; friend class TxEvent; diff --git a/src/dev/mips/malta_io.cc b/src/dev/mips/malta_io.cc index bf7afa63b..b56694f1e 100755 --- a/src/dev/mips/malta_io.cc +++ b/src/dev/mips/malta_io.cc @@ -208,7 +208,7 @@ MaltaIO::RTC::RTCEvent::process() } const char * -MaltaIO::RTC::RTCEvent::description() +MaltaIO::RTC::RTCEvent::description() const { return "malta RTC interrupt"; } @@ -461,7 +461,7 @@ MaltaIO::PITimer::Counter::CounterEvent::process() } const char * -MaltaIO::PITimer::Counter::CounterEvent::description() +MaltaIO::PITimer::Counter::CounterEvent::description() const { return "malta 8254 Interval timer"; } diff --git a/src/dev/mips/malta_io.hh b/src/dev/mips/malta_io.hh index 791d49d60..e24a1d8cb 100755 --- a/src/dev/mips/malta_io.hh +++ b/src/dev/mips/malta_io.hh @@ -79,7 +79,7 @@ class MaltaIO : public BasicPioDevice virtual void process(); /** Event description */ - virtual const char *description(); + virtual const char *description() const; }; private: @@ -171,7 +171,7 @@ class MaltaIO : public BasicPioDevice virtual void process(); /** Event description */ - virtual const char *description(); + virtual const char *description() const; friend class Counter; }; diff --git a/src/dev/uart8250.cc b/src/dev/uart8250.cc index e14b0871e..b4dc93645 100644 --- a/src/dev/uart8250.cc +++ b/src/dev/uart8250.cc @@ -55,7 +55,7 @@ Uart8250::IntrEvent::IntrEvent(Uart8250 *u, int bit) } const char * -Uart8250::IntrEvent::description() +Uart8250::IntrEvent::description() const { return "uart interrupt delay"; } diff --git a/src/dev/uart8250.hh b/src/dev/uart8250.hh index 32b16c17c..2c69667e1 100644 --- a/src/dev/uart8250.hh +++ b/src/dev/uart8250.hh @@ -82,7 +82,7 @@ class Uart8250 : public Uart public: IntrEvent(Uart8250 *u, int bit); virtual void process(); - virtual const char *description(); + virtual const char *description() const; void scheduleIntr(); }; diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh index df48eb8c5..1331a45f9 100644 --- a/src/mem/bridge.hh +++ b/src/mem/bridge.hh @@ -150,7 +150,7 @@ class Bridge : public MemObject virtual void process() { port->trySend(); } - virtual const char *description() { return "bridge send"; } + virtual const char *description() const { return "bridge send"; } }; SendEvent sendEvent; diff --git a/src/mem/bus.cc b/src/mem/bus.cc index cfddfff12..66b20703f 100644 --- a/src/mem/bus.cc +++ b/src/mem/bus.cc @@ -105,7 +105,7 @@ void Bus::BusFreeEvent::process() bus->recvRetry(-1); } -const char * Bus::BusFreeEvent::description() +const char * Bus::BusFreeEvent::description() const { return "bus became available"; } diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 9ba43c79d..0c23175f1 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -131,7 +131,7 @@ class Bus : public MemObject public: BusFreeEvent(Bus * _bus); void process(); - const char *description(); + const char *description() const; }; /** a globally unique id for this bus. */ diff --git a/src/sim/debug.cc b/src/sim/debug.cc index c189117bd..b4f4cd9dc 100644 --- a/src/sim/debug.cc +++ b/src/sim/debug.cc @@ -63,7 +63,7 @@ class DebugBreakEvent : public Event DebugBreakEvent(EventQueue *q, Tick _when); void process(); // process event - virtual const char *description(); + virtual const char *description() const; }; // @@ -87,7 +87,7 @@ DebugBreakEvent::process() const char * -DebugBreakEvent::description() +DebugBreakEvent::description() const { return "debug break"; } diff --git a/src/sim/eventq.cc b/src/sim/eventq.cc index 65e115256..2c679be1e 100644 --- a/src/sim/eventq.cc +++ b/src/sim/eventq.cc @@ -230,7 +230,7 @@ dumpMainQueue() const char * -Event::description() +Event::description() const { return "generic"; } diff --git a/src/sim/eventq.hh b/src/sim/eventq.hh index 6fbba46d5..a454e5d64 100644 --- a/src/sim/eventq.hh +++ b/src/sim/eventq.hh @@ -219,7 +219,7 @@ class Event : public Serializable, public FastAlloc /// Return a C string describing the event. This string should /// *not* be dynamically allocated; just a const char array /// describing the event class. - virtual const char *description(); + virtual const char *description() const; /// Dump the current event data void dump(); @@ -280,7 +280,7 @@ DelayFunction(Tick when, T *object) : Event(&mainEventQueue), object(o) { setFlags(this->AutoDestroy); schedule(when); } void process() { (object->*F)(); } - const char *description() { return "delay"; } + const char *description() const { return "delay"; } }; new DelayEvent(when, object); diff --git a/src/sim/sim_events.cc b/src/sim/sim_events.cc index 1949e88dd..09087ef84 100644 --- a/src/sim/sim_events.cc +++ b/src/sim/sim_events.cc @@ -65,7 +65,7 @@ SimLoopExitEvent::process() const char * -SimLoopExitEvent::description() +SimLoopExitEvent::description() const { return "simulation loop exit"; } @@ -123,7 +123,7 @@ CountedExitEvent::process() const char * -CountedExitEvent::description() +CountedExitEvent::description() const { return "counted exit"; } @@ -153,7 +153,7 @@ CheckSwapEvent::process() } const char * -CheckSwapEvent::description() +CheckSwapEvent::description() const { return "check swap"; } diff --git a/src/sim/sim_events.hh b/src/sim/sim_events.hh index 94e2540b1..58ec963c0 100644 --- a/src/sim/sim_events.hh +++ b/src/sim/sim_events.hh @@ -68,7 +68,7 @@ class SimLoopExitEvent : public Event void process(); // process event - virtual const char *description(); + virtual const char *description() const; }; class CountedDrainEvent : public SimLoopExitEvent @@ -104,7 +104,7 @@ class CountedExitEvent : public Event void process(); // process event - virtual const char *description(); + virtual const char *description() const; }; // @@ -122,7 +122,7 @@ class CheckSwapEvent : public Event void process(); // process event - virtual const char *description(); + virtual const char *description() const; }; #endif // __SIM_SIM_EVENTS_HH__ -- 2.30.2