From 6cfea83fea63b1d2003f80de0b9f10e66e0cfb88 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 21 Jul 2019 16:09:22 +0100 Subject: [PATCH] start also putting in additional DivPipe*Stage usage --- src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py | 15 +++++++- src/ieee754/fpdiv/divstages.py | 43 ++++------------------ 2 files changed, 21 insertions(+), 37 deletions(-) diff --git a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py index 325fceaa..e885aa4d 100644 --- a/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py +++ b/src/ieee754/div_rem_sqrt_rsqrt/div_pipe.py @@ -126,12 +126,23 @@ class DivPipeBaseStage: """ Base Mix-in for DivPipe*Stage. """ def _elaborate(self, m, platform): + m.d.comb += self.o.z.eq(self.i.z) m.d.comb += self.o.oz.eq(self.i.oz) m.d.comb += self.o.out_do_z.eq(self.i.out_do_z) m.d.comb += self.o.ctx.eq(self.i.ctx) -# FIXME: in DivPipeSetupStage.elaborate -# DivPipeBaseStage._elaborate(self, m, platform) + +class DivPipeSetupStage(DivPipeBaseStage, DivPipeCoreSetupStage): + + def __init__(self, pspec): + # XXX TODO: get core_config from pspec + DivPipeCoreSetupStage.__init__(core_config) + self.pspec = pspec + + def elaborate(self, platform): + m = DivPipeCoreSetupStage(platform) # XXX TODO: out_do_z logic! + self._elaborate(m, platform) + return m class DivPipeCalculateStage(DivPipeBaseStage, DivPipeCoreCalculateStage): diff --git a/src/ieee754/fpdiv/divstages.py b/src/ieee754/fpdiv/divstages.py index 2e38cd92..9303d960 100644 --- a/src/ieee754/fpdiv/divstages.py +++ b/src/ieee754/fpdiv/divstages.py @@ -15,10 +15,6 @@ from ieee754.fpcommon.postcalc import FPAddStage1Data # TODO: write these from .div0 import FPDivStage0Mod -from .div1 import FPDivStage1Mod # can be dropped entirely - # (replaced with DivPipeCalculateStage) - # note, yes, DivPipeCalculateStage *NOT* - # DivPipeCoreCalculateStage from .div2 import FPDivStage2Mod from .div0 import FPDivStage0Data @@ -37,8 +33,7 @@ class FPDivStagesSetup(FPState, SimpleHandshake): return FPSCData(self.pspec, False) # from denorm def ospec(self): - # XXX TODO: replace with "intermediary" (DivPipeInterstageData) - return FPDivStage0Data(self.pspec) # DIV ospec (loop) + return DivPipeInterstageData(self.pspec) # DIV ospec (loop) def setup(self, m, i): """ links module to inputs and outputs. @@ -56,22 +51,14 @@ class FPDivStagesSetup(FPState, SimpleHandshake): # does 1 "convert" (actual processing) from DivPipeInputData # into "intermediate" output (DivPipeInterstageData) - # vvvvvvv - # FIXME divstages.append(DivPipeSetupStage(something)) - # ^^^^^^^ + divstages.append(DivPipeSetupStage(self.pspec)) # here is where the intermediary stages are added. # n_stages is adjusted (in pipeline.py), reduced to take # into account the extra processing that self.begin and self.end # will add. for count in range(self.n_stages): # number of combinatorial stages - # XXX: this can actually be entirely dropped... - divstages.append(FPDivStage1Mod(self.pspec)) - - # ... and replaced with this. - # vvvvvvv - #divstages.append(DivPipeCalculateStage(core_config, count)) - # ^^^^^^^ + divstages.append(DivPipeCalculateStage(self.pspec, count)) chain = StageChain(divstages) chain.setup(m, i) @@ -119,13 +106,7 @@ class FPDivStagesIntermediary(FPState, SimpleHandshake): # into account the extra processing that self.begin and self.end # will add. for count in range(self.n_stages): # number of combinatorial stages - # XXX: this can actually be entirely dropped... - divstages.append(FPDivStage1Mod(self.pspec)) - - # ... and replaced with this. - # vvvvvvv - #divstages.append(DivPipeCalculateStage(core_config, count)) - # ^^^^^^^ + divstages.append(DivPipeCalculateStage(self.pspec, count)) chain = StageChain(divstages) chain.setup(m, i) @@ -151,8 +132,8 @@ class FPDivStagesFinal(FPState, SimpleHandshake): self.m1o = self.ospec() def ispec(self): - # XXX TODO: replace with "intermediary" (DivPipeInterstageData?) - return FPDivStage0Data(self.pspec) # DIV ispec (loop) + # XXX TODO: replace with "intermediary" (?) + return DivPipeInterstageData(self.pspec) # DIV ispec (loop) def ospec(self): # REQUIRED. do NOT change. @@ -176,18 +157,10 @@ class FPDivStagesFinal(FPState, SimpleHandshake): # into account the extra processing that self.begin and self.end # will add. for count in range(self.n_stages): # number of combinatorial stages - # XXX: this can actually be entirely dropped... - divstages.append(FPDivStage1Mod(self.pspec)) - - # ... and replaced with this. - # vvvvvvv - #divstages.append(DivPipeCalculateStage(core_config, count)) - # ^^^^^^^ + divstages.append(DivPipeCalculateStage(pspec, count)) # does the final conversion from intermediary to output data - # vvvvvvv - # FIXME divstages.append(DivPipeFinalStage(something)) - # ^^^^^^^ + divstages.append(DivPipeFinalStage(pspec)) # does conversion from DivPipeOutputData into # FPAddStage1Data format (bad name, TODO, doesn't matter), -- 2.30.2