From 6d0896de1d2cbbb925f3cddfa7baa721d635cb17 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 28 Apr 2020 10:32:13 +0200 Subject: [PATCH] cpu/serv: switch to pythondata package instead of local git clone. --- litex/soc/cores/cpu/serv/core.py | 9 ++++----- litex_setup.py | 1 + 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/litex/soc/cores/cpu/serv/core.py b/litex/soc/cores/cpu/serv/core.py index 92d49a6f..d99661d6 100644 --- a/litex/soc/cores/cpu/serv/core.py +++ b/litex/soc/cores/cpu/serv/core.py @@ -6,6 +6,7 @@ import os from migen import * +from litex import get_data_mod from litex.soc.interconnect import wishbone from litex.soc.cores.cpu import CPU @@ -80,11 +81,9 @@ class SERV(CPU): @staticmethod def add_sources(platform): - # FIXME: add SERV as submodule - os.system("git clone https://github.com/olofk/serv") - vdir = os.path.join("serv", "rtl") - platform.add_source_dir(vdir) - platform.add_verilog_include_path(vdir) + vdir = get_data_mod("cpu", "serv").data_location + platform.add_source_dir(os.path.join(vdir, "rtl")) + platform.add_verilog_include_path(os.path.join(vdir, "rtl")) def do_finalize(self): assert hasattr(self, "reset_address") diff --git a/litex_setup.py b/litex_setup.py index 52c2635e..f2502abc 100755 --- a/litex_setup.py +++ b/litex_setup.py @@ -42,6 +42,7 @@ repos = [ ("pythondata-cpu-lm32", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-mor1kx", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-picorv32", ("https://github.com/litex-hub/", False, True)), + ("pythondata-cpu-serv", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-vexriscv", ("https://github.com/litex-hub/", False, True)), ("pythondata-cpu-rocket", ("https://github.com/litex-hub/", False, True)), ] -- 2.30.2