From 6da01eab5e40b1e91a7406e6f9ad5ff5ef50793d Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 7 Oct 2018 08:03:11 +0100 Subject: [PATCH] add rd bit-setting function --- riscv/sv.cc | 13 +++++++++++++ riscv/sv_decode.h | 5 +++++ 2 files changed, 18 insertions(+) diff --git a/riscv/sv.cc b/riscv/sv.cc index 8088ef4..6979e44 100644 --- a/riscv/sv.cc +++ b/riscv/sv.cc @@ -189,3 +189,16 @@ uint64_t sv_insn_t::_rvc_spoffs_imm(uint64_t elwidth, uint64_t offs) return offs; } +// for use in predicated branches. sets bit N if val=true; clears bit N if false +uint64_t sv_insn_t::rd_bitset(uint64_t bit, bool set) +{ + reg_t reg = rd(); + uint64_t val = READ_REG(reg); + if (set) { + val |= (1<