From 6dc591068833bc9401b0235a2f1a6bfb7b49211d Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 2 Apr 2022 13:33:47 +0100 Subject: [PATCH] --- openpower/sv/cr_int_predication.mdwn | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index fd9a580d1..f687d7460 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -55,16 +55,8 @@ this gets particularly powerful if data-dependent predication is also enabled. # Bit ordering. -IBM chose MSB0 for the OpenPOWER v3.0B specification. This makes things slightly hair-raising and the relationship between the CR and the CR Field -numbers is not clearly defined. To make it clear we define a new -term, `CR{n}`. -`CR{n}` refers to `CR0` when `n=0` and consequently, for CR0-7, is defined, in v3.0B pseudocode, as: - - CR{7-n} = CR[32+n*4:35+n*4] - -Also note that for SVP64 the relationship for the sequential -numbering of elements is to the CR **fields** within -the CR Register, not to individual bits within the CR register. +Please see [[svp64/appendix]] regarding CR bit ordering and for +the definition of `CR{n}` # Instruction form and pseudocode -- 2.30.2