From 6de0c1e324745f426d5ff3c30af2acbe10042ceb Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Fri, 12 Jul 2013 18:20:16 -0700 Subject: [PATCH] Fix SR_U64 bit being ignored --- riscv/dispatch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/dispatch b/riscv/dispatch index 231853c..5afc3be 100755 --- a/riscv/dispatch +++ b/riscv/dispatch @@ -49,7 +49,7 @@ if filenum == numfiles: if filenum == numfiles+1: print '#define get_insn_func(insn, sr) \\' - print ' processor_t::dispatch_table[((((sr) & SR_S) ? (sr & SR_S64) : (SR_U64)) ? %d : 0) + ((insn).bits %% %d)]' % (tablesz, tablesz) + print ' processor_t::dispatch_table[((((sr) & SR_S) ? (sr & SR_S64) : (sr & SR_U64)) ? %d : 0) + ((insn).bits %% %d)]' % (tablesz, tablesz) print 'static const insn_func_t dispatch_table[%d];' % (2*tablesz) for i in range(0, tablesz): -- 2.30.2