From 6df5eaaea8551bee189047a0c35806dabdf89f84 Mon Sep 17 00:00:00 2001
From: Andrew Waterman <waterman@s141.Millennium.Berkeley.EDU>
Date: Mon, 6 Sep 2010 22:48:37 -0700
Subject: [PATCH] [sim, xcc] added PCRs to replace k0 and k1

---
 riscv/insns/mfpcr.h  |  7 +++++++
 riscv/insns/mtpcr.h  |  7 +++++++
 riscv/insns/mwfpcr.h | 28 ----------------------------
 riscv/insns/mwtpcr.h | 18 ------------------
 riscv/insns/rdhwr.h  |  0
 riscv/insns/slori.h  |  1 -
 riscv/processor.h    |  2 ++
 7 files changed, 16 insertions(+), 47 deletions(-)
 delete mode 100644 riscv/insns/mwfpcr.h
 delete mode 100644 riscv/insns/mwtpcr.h
 delete mode 100644 riscv/insns/rdhwr.h
 delete mode 100644 riscv/insns/slori.h

diff --git a/riscv/insns/mfpcr.h b/riscv/insns/mfpcr.h
index 05ed297..d9bfc22 100644
--- a/riscv/insns/mfpcr.h
+++ b/riscv/insns/mfpcr.h
@@ -25,6 +25,13 @@ switch(insn.rtype.rb)
     val = sim->get_fromhost();
     break;
 
+  case 24:
+    val = pcr_k0;
+    break;
+  case 25:
+    val = pcr_k1;
+    break;
+
   default:
     val = -1;
 }
diff --git a/riscv/insns/mtpcr.h b/riscv/insns/mtpcr.h
index 01b3e2f..cbb580b 100644
--- a/riscv/insns/mtpcr.h
+++ b/riscv/insns/mtpcr.h
@@ -17,4 +17,11 @@ switch(insn.rtype.rb)
   case 16:
     sim->set_tohost(val);
     break;
+
+  case 24:
+    pcr_k0 = val;
+    break;
+  case 25:
+    pcr_k1 = val;
+    break;
 }
diff --git a/riscv/insns/mwfpcr.h b/riscv/insns/mwfpcr.h
deleted file mode 100644
index 8a0a84a..0000000
--- a/riscv/insns/mwfpcr.h
+++ /dev/null
@@ -1,28 +0,0 @@
-require_supervisor;
-
-switch(insn.rtype.rb)
-{
-  case 0:
-    RA = sext32(sr);
-    break;
-  case 1:
-    RA = sext32(epc);
-    break;
-  case 2:
-    RA = sext32(badvaddr);
-    break;
-  case 3:
-    RA = sext32(ebase);
-    break;
-
-  case 8:
-    RA = sext32(MEMSIZE >> 12);
-    break;
-
-  case 17:
-    RA = sext32(sim->get_fromhost());
-    break;
-
-  default:
-    RA = -1;
-}
diff --git a/riscv/insns/mwtpcr.h b/riscv/insns/mwtpcr.h
deleted file mode 100644
index ca593df..0000000
--- a/riscv/insns/mwtpcr.h
+++ /dev/null
@@ -1,18 +0,0 @@
-require_supervisor;
-
-switch(insn.rtype.rb)
-{
-  case 0:
-    set_sr(sext32(RA));
-    break;
-  case 1:
-    epc = sext32(RA);
-    break;
-  case 3:
-    ebase = sext32(RA & ~0xFFF);
-    break;
-
-  case 16:
-    sim->set_tohost(sext32(RA));
-    break;
-}
diff --git a/riscv/insns/rdhwr.h b/riscv/insns/rdhwr.h
deleted file mode 100644
index e69de29..0000000
diff --git a/riscv/insns/slori.h b/riscv/insns/slori.h
deleted file mode 100644
index 732091b..0000000
--- a/riscv/insns/slori.h
+++ /dev/null
@@ -1 +0,0 @@
-RA = (RA << 32) | (BIGIMM << IMM_BITS);
diff --git a/riscv/processor.h b/riscv/processor.h
index 942c491..2624b40 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -27,6 +27,8 @@ private:
   reg_t epc;
   reg_t badvaddr;
   reg_t ebase;
+  reg_t pcr_k0;
+  reg_t pcr_k1;
   uint32_t id;
   uint32_t sr;
 
-- 
2.30.2