From 6e67e79de4985b20aa0dfa400fa3e6564326a66e Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Thu, 30 Aug 2018 17:11:23 +0200 Subject: [PATCH] radeonsi: const-ify si_set_tesseval_regs MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_shaders.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index de00df60ae5..f751906c6d6 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -337,10 +337,10 @@ void si_destroy_shader_cache(struct si_screen *sscreen) /* SHADER STATES */ static void si_set_tesseval_regs(struct si_screen *sscreen, - struct si_shader_selector *tes, + const struct si_shader_selector *tes, struct si_pm4_state *pm4) { - struct tgsi_shader_info *info = &tes->info; + const struct tgsi_shader_info *info = &tes->info; unsigned tes_prim_mode = info->properties[TGSI_PROPERTY_TES_PRIM_MODE]; unsigned tes_spacing = info->properties[TGSI_PROPERTY_TES_SPACING]; bool tes_vertex_order_cw = info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW]; -- 2.30.2