From 6f1468c371c7ceebf4d70933d60f70ef119fedcc Mon Sep 17 00:00:00 2001 From: Andres Gomez Date: Tue, 24 Sep 2019 01:16:11 +0300 Subject: [PATCH] i965/fs: add a comment about how the rounding mode in fmul is set MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit After 1711bf6cf2d ("intel/fs: Generate better code for fsign multiplied by a value"), the conflicts resolution for setting the rounding mode after the fused fmul and fsign optimization is non obvious. Basically, the optimization doesn't really result in a MUL, or any other operation which would need to have the rounding mode set. Hence, we set it just before the actual MUL in the treatment of fmul. Fixes: ba1e25e1aa6 ("i965/fs: set rounding mode when emitting fadd, fmul and ffma instructions") Suggested-by: Caio Marcelo de Oliveira Filho Signed-off-by: Andres Gomez Reviewed-by: Caio Marcelo de Oliveira Filho Reviewed-by: Samuel Iglesias Gonsálvez --- src/intel/compiler/brw_fs_nir.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index f9e81e14f3a..5b37f4dc382 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -1258,6 +1258,10 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr, } } + /* We emit the rounding mode after the previous fsign optimization since + * it won't result in a MUL, but will try to negate the value by other + * means. + */ if (nir_has_any_rounding_mode_enabled(execution_mode)) { brw_rnd_mode rnd = brw_rnd_mode_from_execution_mode(execution_mode); -- 2.30.2