From 6f27e4b9e056e03e5ff30f67ab1cfa301788af39 Mon Sep 17 00:00:00 2001 From: Andrey Miroshnikov Date: Thu, 4 Nov 2021 13:48:52 +0000 Subject: [PATCH] Added pincount estimates based on ls180 pinmux --- crypto_router_pinmux.mdwn | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/crypto_router_pinmux.mdwn b/crypto_router_pinmux.mdwn index 48bcbbd39..2066d1af5 100644 --- a/crypto_router_pinmux.mdwn +++ b/crypto_router_pinmux.mdwn @@ -7,17 +7,25 @@ # Expected Package * QFP 200 pin? -# Functionality and Pincount: -* 5x RGMII Ethernet - 5x12 = **60 pins** -* 2x USB ULPI - 2x12 = **24 pins** -* GPIO (plain and EINT) - **? pins** -* SDRAM - 16-bit data, 9-bit addr, rd/wr - **approx 30 pins?** -* I2C - **2 pins** -* SPI - assuming 4-pin - **4 pins** -* QSPI - **6 pins** -* JTAG - Can't read nmigen well enough, assuming TCK, TDO, TMS, TDI - **4 pins** -* Power Vdd and Vss - **? pins** +# Functionality and Pincount (NOT FINAL, LIKELY TO CHANGE): +* 5x RGMII Ethernet - 5x12 = 60 pins +* 2x USB ULPI - 2x12 = 24 pins +* GPIO - 16 pins +* EINT - 3 pins +* SDRAM - 39 pins +* UART - 2 pins +* I2C - 2 pins +* SPI - 4 pins +* QSPI - Could share with SPI - 6 pins +* SD/MMC - Could share with SPI - 4 pins +* JTAG - 4 pins +* Power Vdd - 8 pins +* Power Vss - 8 pins +* Reset - 1 pin +* PLL - 5 pins -Total (**not including power and GPIO pins**): 130 pins +Total: **186** pins + +GPIO, EINT, Vdd, Vss, SDRAM, reset, PLL pin counts come from the LS180 pinmux definitions. RGMII pinout count comes from [here](https://web.pa.msu.edu/hep/atlas/l1calo/hub/hardware/components/micrel/rgmii_specification_hp_v1.3_dec_2000.pdf) \ No newline at end of file -- 2.30.2