From 6f961a08908e108ea00e967ffdcb73bcf616155e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 11 Sep 2022 17:50:03 +0100 Subject: [PATCH] clarify tables --- openpower/sv/rfc/ls001.mdwn | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index ab90d5d3d..cb40d6e73 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -403,7 +403,7 @@ Power ISA v3.1 Section 1.6.3 Book I calls it a "Scalar word". |--------|--------| | PO | EXT000-031 Scalar (v3.0 or v3.1) operation | -**RESERVED2 / EXT300-363** +**RESERVED2 / EXT300-363** bit6=old bit7=scalar This is entirely at the discretion of the ISA WG. Libre-SOC is *not* proposing the addition of EXT300-363: it is merely a possibility for @@ -418,7 +418,7 @@ for other purposes. |--------|---|---|-------|---------| | PO (9)?| 1 | 0 | 0000 | EXT300-363 or `RESERVED1` | -**{EXT200-263}** +**{EXT200-263}** bit6=new bit7=scalar This encoding represents the opportunity to introduce EXT200-263. It is a Scalar-word encoding, and does not require implementing @@ -429,7 +429,7 @@ PO2 is in the range 0b00000 to 0b11111 to represent EXT200-263 respectively. |--------|---|---|-------|--------|---------| | PO (9)?| 0 | 0 | 0000 | PO2 | {EXT200-263} | -**SVP64Single:{EXT200-263}** +**SVP64Single:{EXT200-263}** bit6=new bit7=scalar This encoding, which is effectively "implicit VL=1" and comprising (from bits 8-31) @@ -442,7 +442,7 @@ implemented as pure Scalar. |--------|---|---|-------|--------|---------| | PO (9)?| 0 | 0 | !zero | PO2 | SVP64Single:{EXT200-263} | -**SVP64Single:{EXT000-063}** +**SVP64Single:{EXT000-063}** bit6=old bit7=scalar This encoding, identical to SVP64Single:{EXT200-263}, introduces SVP64Single Augmentation of v3.0 Scalar word instructions. @@ -453,7 +453,11 @@ exact same Scalar word. PO2 is in the range 0b00000 to 0b11111 to represent EXT000-063 respectively. Augmenting EXT001 is prohibited. -**SVP64:{EXT200-263}** +| 0-5 | 6 | 7 | 8-31 | 32-37 | 38-63 | +|--------|---|---|-------|--------|---------| +| PO (9)?| 1 | 0 | !zero | PO2 | SVP64Single:{EXT000-063} | + +**SVP64:{EXT200-263}** bit6=new bit7=vector This encoding, which permits VL to be dynamic (settable from GPR or CTR) is the Vectorisation of EXT200-263. @@ -467,7 +471,7 @@ at runtime, even when bits 8-31 are zero. |--------|---|---|-------|--------|---------| | PO (9)?| 0 | 1 | nnnn | PO2 | SVP64:{EXT200-263} | -**SVP64:{EXT000-063}** +**SVP64:{EXT000-063}** bit6=old bit7=vector This encoding is identical to **SVP64:{EXT200-263}** except it is the Vectorisation of existing v3.0/3.1 Scalar-words, EXT000-063. -- 2.30.2