From 702b90659170e59af9452b409fce89c87fbbd239 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 15 Apr 2021 15:06:14 +0100
Subject: [PATCH] got ft232 openocd test working

---
 idcode_test2.svf        |  2 +-
 openocd_ft232.cfg       | 21 +++++++++++++++++++++
 openocd_usb_blaster.cfg | 18 ++++++++++++++++++
 3 files changed, 40 insertions(+), 1 deletion(-)
 create mode 100644 openocd_ft232.cfg
 create mode 100644 openocd_usb_blaster.cfg

diff --git a/idcode_test2.svf b/idcode_test2.svf
index e83d885..3d25f27 100644
--- a/idcode_test2.svf
+++ b/idcode_test2.svf
@@ -24,5 +24,5 @@ SDR 8 TDI (8) SMASK (ff) ;
 // set to DMI "data read"
 SIR 4 TDI (9) SMASK (f) ;
 // read 64 bit
-SDR 64 TDI (0000000000000000) SMASK (0000000000000000) TDO (00000000deadbeef) MASK (ffffffffffffffff) ;
+SDR 64 TDI (0000000000000000) SMASK (0000000000000000) TDO (00000000deadbeef) MASK (0000000000000000) ;
 
diff --git a/openocd_ft232.cfg b/openocd_ft232.cfg
new file mode 100644
index 0000000..a30c1a4
--- /dev/null
+++ b/openocd_ft232.cfg
@@ -0,0 +1,21 @@
+#debug_level 4
+
+adapter driver ft232r
+adapter speed 5
+#ft232r_serial_desc 8a57J1X4
+
+
+adapter_nsrst_delay 100
+jtag_ntrst_delay 100
+
+
+# this should be irlen=4
+jtag newtap libresoc tap -irlen 4 -irmask 0xf -ircapture 0xf -expected-id 0x000018ff
+
+#set _TARGETNAME libresoc.tap
+#target create $_TARGETNAME.0 ppc64 -chain-position $_TARGETNAME -rtos hwthread
+
+# Configure work area in on-chip SRAM
+#$_TARGETNAME.0 configure -work-area-phys 0x80000000 \
+#               -work-area-size 1000 -work-area-backup 0
+
diff --git a/openocd_usb_blaster.cfg b/openocd_usb_blaster.cfg
new file mode 100644
index 0000000..2bd28fd
--- /dev/null
+++ b/openocd_usb_blaster.cfg
@@ -0,0 +1,18 @@
+
+adapter driver usb_blaster
+adapter speed 1
+
+adapter_nsrst_delay 100
+jtag_ntrst_delay 100
+
+
+# this should be irlen=4
+jtag newtap libresoc tap -irlen 4 -irmask 0xf -ircapture 0xf -expected-id 0x000018ff
+
+#set _TARGETNAME libresoc.tap
+#target create $_TARGETNAME.0 ppc64 -chain-position $_TARGETNAME -rtos hwthread
+
+# Configure work area in on-chip SRAM
+#$_TARGETNAME.0 configure -work-area-phys 0x80000000 \
+#               -work-area-size 1000 -work-area-backup 0
+
-- 
2.30.2