From 71220433a257762026779fba7ee6b9075e122fee Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 29 Oct 2018 06:07:37 +0000 Subject: [PATCH] remove unneeded commented-out code --- riscv/sv_insn_redirect.h | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index 5c82172..a04a828 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -54,33 +54,17 @@ class insn_t; #define SHAMT get_shamt() #define UINT64_MAX uint64_max() -//typedef reg_t sv_reg_t; -//typedef sreg_t sv_sreg_t; -//typedef float32_t sv_float32_t; -//typedef float64_t sv_float64_t; -//typedef float128_t sv_float128_t; -//typedef freg_t sv_freg_t; - class sv_proc_t { public: sv_proc_t(processor_t *_p) : p(_p), _insn(NULL), xlen(0) {} - //void (WRITE_RD)(bool value); // f32_eq calls this: XXX TODO investigate - //void (WRITE_RD)(sv_reg_t &value); - //void (WRITE_RD)(int_fast64_t value); // XXX TODO investigate - //void (WRITE_RD)(uint_fast64_t value); // XXX TODO investigate void (WRITE_RD)(sv_reg_t const& value); // XXX TODO investigate - //void (WRITE_RD)(sv_sreg_t value); // XXX TODO investigate void (WRITE_RVC_RS2S)(sv_reg_t const& value); // XXX TODO investigate void (WRITE_RVC_FRS2S)(sv_float64_t const& value); // XXX TODO investigate void (WRITE_RVC_FRS2S)(sv_float32_t value); // XXX TODO investigate - //void (WRITE_RVC_RS2S)(sv_sreg_t value); // XXX TODO investigate void (WRITE_RVC_RS1S)(sv_reg_t const& value); // XXX TODO investigate - //void (WRITE_RVC_RS1S)(sv_sreg_t value); // XXX TODO investigate - //void (WRITE_REG)(reg_t reg, uint64_t value); void (DO_WRITE_FREG)(reg_spec_t const®, sv_freg_t const& value); void (WRITE_REG)(reg_spec_t const®, sv_reg_t const& value); - //void (WRITE_REG)(reg_t reg, sv_sreg_t value); void (WRITE_FRD)(sv_freg_t value); void (WRITE_FRD)(sv_float128_t value); void (WRITE_FRD)(sv_float64_t value); @@ -97,8 +81,6 @@ public: class { public: sv_insn_t *_insn; - //sv_insn_t & operator = (sv_insn_t &i) - //{ _insn = &i; return i; } operator sv_insn_t() & { return *this->_insn; } } insn; @@ -136,11 +118,7 @@ public: sv_sreg_t (sext_xlen)(sv_sreg_t const& v); // WARNING... sv_sreg_t (sext_xlen)(sv_reg_t const& v); // WARNING... sv_reg_t (zext_xlen)(sv_reg_t const& v); - //reg_t (sext_xlen)(sv_reg_t &v); - //reg_t (sext32)(uint_fast32_t v); // XXX TODO sv_sreg_t (sext32)(sv_reg_t const& v); - //sv_sreg_t (sext32)(sv_sreg_t v); - //reg_t (sext32)(sv_reg_t &v); sv_reg_t (zext32)(sv_reg_t const& v); sv_reg_t rv_add(sv_reg_t const & lhs, sv_reg_t const & rhs); @@ -157,7 +135,6 @@ public: sv_reg_t rv_xor(sv_reg_t const & lhs, sv_reg_t const & rhs); sv_reg_t rv_sl(sv_reg_t const & lhs, sv_reg_t const & rhs); sv_reg_t rv_sr(sv_reg_t const & lhs, sv_reg_t const & rhs); - //sv_sreg_t rv_sr(sv_sreg_t const & lhs, sv_reg_t const & rhs); bool rv_lt(sv_reg_t const & lhs, sv_reg_t const & rhs); bool rv_lt(sv_sreg_t const & lhs, sv_sreg_t const & rhs); bool rv_gt(sv_reg_t const & lhs, sv_reg_t const & rhs); -- 2.30.2