From 712a93d637f8f49194b756d5ea8eb51d4de66608 Mon Sep 17 00:00:00 2001 From: Richard Biener Date: Tue, 12 Jul 2016 08:56:14 +0000 Subject: [PATCH] re PR tree-optimization/68961 (Test case gcc.target/powerpc/pr60203.c fails since r231674) 2016-07-12 Richard Biener PR rtl-optimization/68961 * fwprop.c (propagate_rtx): Allow SUBREGs of VEC_CONCAT and CONCAT to simplify to a non-constant. * gcc.target/i386/pr68961.c: New testcase. From-SVN: r238238 --- gcc/ChangeLog | 6 ++++++ gcc/fwprop.c | 9 +++++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr68961.c | 19 +++++++++++++++++++ 4 files changed, 39 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr68961.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7252ef87846..3c9432a67a7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-07-12 Richard Biener + + PR rtl-optimization/68961 + * fwprop.c (propagate_rtx): Allow SUBREGs of VEC_CONCAT and CONCAT + to simplify to a non-constant. + 2016-07-11 Jakub Jelinek PR middle-end/71758 diff --git a/gcc/fwprop.c b/gcc/fwprop.c index 7834bca7f51..88cfefbe1ef 100644 --- a/gcc/fwprop.c +++ b/gcc/fwprop.c @@ -619,6 +619,15 @@ propagate_rtx_1 (rtx *px, rtx old_rtx, rtx new_rtx, int flags) *px = tem; + /* Allow replacements that simplify operations on a vector or complex + value to a component. The most prominent case is + (subreg ([vec_]concat ...)). */ + if (REG_P (tem) && !HARD_REGISTER_P (tem) + && (VECTOR_MODE_P (GET_MODE (new_rtx)) + || COMPLEX_MODE_P (GET_MODE (new_rtx))) + && GET_MODE (tem) == GET_MODE_INNER (GET_MODE (new_rtx))) + return true; + /* The replacement we made so far is valid, if all of the recursive replacements were valid, or we could simplify everything to a constant. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a171ad874e9..f524bdac964 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-07-12 Richard Biener + + PR rtl-optimization/68961 + * gcc.target/i386/pr68961.c: New testcase. + 2016-07-11 Jakub Jelinek PR middle-end/71758 diff --git a/gcc/testsuite/gcc.target/i386/pr68961.c b/gcc/testsuite/gcc.target/i386/pr68961.c new file mode 100644 index 00000000000..ef379c4701a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr68961.c @@ -0,0 +1,19 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O3 -fno-vect-cost-model -fdump-tree-slp2-details" } */ + +struct x { double d[2]; }; + +struct x +pack (double a, double aa) +{ + struct x u; + u.d[0] = a; + u.d[1] = aa; + return u; +} + +/* The function should be optimized to just return as arguments and + result exactly overlap even when previously vectorized. */ + +/* { dg-final { scan-tree-dump "basic block vectorized" "slp2" } } */ +/* { dg-final { scan-assembler-not "mov" } } */ -- 2.30.2