From 713069071df4f92b8b67284347f152d0574cbbb1 Mon Sep 17 00:00:00 2001 From: Pierre Ayoub Date: Sat, 3 Oct 2020 16:42:22 +0200 Subject: [PATCH] cpu: Add recursion for DTB entry generation inside BaseCPU Change-Id: Ice93b67ee44a1228120f8a63ad5b9d952f813c70 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35556 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/cpu/BaseCPU.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py index ad91f3a53..edd1e3316 100644 --- a/src/cpu/BaseCPU.py +++ b/src/cpu/BaseCPU.py @@ -301,6 +301,12 @@ class BaseCPU(ClockedObject): yield cpus_node + # Generate nodes from the BaseCPU children (hence under the root node, + # and don't add them as subnode). Please note: this is mainly needed + # for the ISA class, to generate the PMU entry in the DTB. + for child_node in self.recurseDeviceTree(state): + yield child_node + def __init__(self, **kwargs): super(BaseCPU, self).__init__(**kwargs) self.power_state.possible_states=['ON', 'CLK_GATED', 'OFF'] -- 2.30.2