From 71ff6d225bb1e4e06e9539197193fd08209f0bd9 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sat, 19 Aug 2023 17:07:27 +0100
Subject: [PATCH]

---
 HDL_workflow/HyperRAM.mdwn | 1 +
 1 file changed, 1 insertion(+)

diff --git a/HDL_workflow/HyperRAM.mdwn b/HDL_workflow/HyperRAM.mdwn
index 9e0670b3d..f18bc289a 100644
--- a/HDL_workflow/HyperRAM.mdwn
+++ b/HDL_workflow/HyperRAM.mdwn
@@ -9,6 +9,7 @@
   <https://ftp.libre-soc.org/W956x8MBYA_64Mb_HyperBus_pSRAM_TFBGA24_datasheet_A01-005_20211208.pdf>
 * Winbond Verilog Model for W956A8MBY:
   <https://www.winbond.com/resource-files/W956x8MBY_verilog_p.zip>
+* [[shakti/m_class/HyperRAM]]
 
 ```
 from nmigen.resources.memory import HyperRAMResources
-- 
2.30.2