From 7209014698822e04965b99b0015ae62e458f2a83 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 7 May 2022 17:51:47 +0100 Subject: [PATCH] --- openpower/sv/SimpleV_rationale.mdwn | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index bd7a8df2f..4aa3abba1 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -537,6 +537,11 @@ can be proposed. These are: **ZOLC: Zero-Overhead Loop Control** +Zero-Overhead Looping is the concept of automatically running a set sequence +of instructions for a predetermined number of times, without requiring +a branch. This is slightly different from using Power ISA `bc` in `CTR` +(Counter) Mode, because in ZOLC the branch-back is automatic. + The simplest longest commercially successful deployment of Zero-overhead looping has been in Texas Instruments TMS320 DSPs. Up to fourteen sub-instructions within the VLIW word may be repeatedly deployed on successive clock -- 2.30.2