From 72217988ca377398e5c7c1ae98b83ca53b1877d4 Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Mon, 13 Aug 2018 21:27:56 +0200 Subject: [PATCH] rs6000: Fix pr56605.c After the combine 2-2 changes, this testcase does not have a ZERO_EXTEND in the intermediate code, but an AND instead. gcc/testsuite/ * gcc.target/powerpc/pr56605.c: The generated code can have an AND instead of a ZERO_EXTEND. From-SVN: r263521 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/powerpc/pr56605.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ad2610b91b5..e46072fa9ab 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-08-13 Segher Boessenkool + + * gcc.target/powerpc/pr56605.c: The generated code can have an AND + instead of a ZERO_EXTEND. + 2018-08-13 Martin Sebor PR tree-optimization/71625 diff --git a/gcc/testsuite/gcc.target/powerpc/pr56605.c b/gcc/testsuite/gcc.target/powerpc/pr56605.c index dc8764040e3..304d6d689d5 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr56605.c +++ b/gcc/testsuite/gcc.target/powerpc/pr56605.c @@ -12,5 +12,5 @@ void foo (short* __restrict sb, int* __restrict ia) ia[i] = (int) sb[i]; } -/* { dg-final { scan-rtl-dump-times "\\\(compare:CC \\\(zero_extend:DI \\\(reg:SI" 1 "combine" } } */ +/* { dg-final { scan-rtl-dump-times "\\\(compare:CC \\\((?:and|zero_extend):DI \\\(reg:\[SD\]I" 1 "combine" } } */ -- 2.30.2