From 722d9b749c249491a3777af07b6b20b6964ae1b1 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Sun, 3 Apr 2022 22:46:31 -0700 Subject: [PATCH] fix after move --- src/nmigen_gf/hdl/test/test_clmul.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/nmigen_gf/hdl/test/test_clmul.py b/src/nmigen_gf/hdl/test/test_clmul.py index ed39fed..dc0e6fd 100644 --- a/src/nmigen_gf/hdl/test/test_clmul.py +++ b/src/nmigen_gf/hdl/test/test_clmul.py @@ -12,7 +12,7 @@ from nmigen.hdl.ast import (AnyConst, Assert, Signal, Const, unsigned, signed, from nmigen.hdl.dsl import Module from nmutil.formaltest import FHDLTestCase from nmigen_gf.reference.clmul import clmul -from nmutil.clmul import BitwiseXorReduce, CLMulAdd +from nmigen_gf.hdl.clmul import BitwiseXorReduce, CLMulAdd from nmigen.sim import Delay from nmutil.sim_util import do_sim, hash_256 -- 2.30.2