From 72b04e5db9b3354a5b9463e049c2a32c36545a75 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 11 May 2021 11:07:55 +0100 Subject: [PATCH] comment tidyup --- src/soc/fu/ldst/loadstore.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py index ab217bd0..b2713639 100644 --- a/src/soc/fu/ldst/loadstore.py +++ b/src/soc/fu/ldst/loadstore.py @@ -212,7 +212,7 @@ class LoadStore1(PortInterfaceBase): m.d.comb += self.d_validblip.eq(1) # re-run dcache req sync += self.state.eq(State.ACK_WAIT) with m.Else(): - # instruction lookup fault: + # instruction lookup fault: store address in DAR comb += exc.happened.eq(1) sync += self.dar.eq(self.addr) @@ -228,6 +228,7 @@ class LoadStore1(PortInterfaceBase): with m.Case(State.TLBIE_WAIT): pass + # alignment error: store address in DAR with m.If(self.align_intr): comb += exc.happened.eq(1) sync += self.dar.eq(self.addr) -- 2.30.2