From 73b0d10152728e9820d1706564e1f4b9c9bec9ca Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 30 May 2018 21:24:06 -0400 Subject: [PATCH] radeonsi: don't set VGT_LS_HS_CONFIG if it doesn't change MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Tested-by: Dieter Nützel --- src/gallium/drivers/radeonsi/si_gfx_cs.c | 1 + src/gallium/drivers/radeonsi/si_pipe.h | 1 + src/gallium/drivers/radeonsi/si_state_draw.c | 16 ++++++++++------ 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index d1596a31774..b81773e01a0 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -318,6 +318,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx) ctx->last_tcs = NULL; ctx->last_tes_sh_base = -1; ctx->last_num_tcs_input_cp = -1; + ctx->last_ls_hs_config = -1; /* impossible value */ ctx->cs_shader_state.initialized = false; diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index e7f6b45ccc6..ea199d3924d 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -916,6 +916,7 @@ struct si_context { int last_tes_sh_base; bool last_tess_uses_primid; unsigned last_num_patches; + int last_ls_hs_config; /* Debug state. */ bool is_debug; diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 845ec468aec..42522c01291 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -280,12 +280,16 @@ static void si_emit_derived_tess_state(struct si_context *sctx, S_028B58_HS_NUM_INPUT_CP(num_tcs_input_cp) | S_028B58_HS_NUM_OUTPUT_CP(num_tcs_output_cp); - if (sctx->chip_class >= CIK) - radeon_set_context_reg_idx(cs, R_028B58_VGT_LS_HS_CONFIG, 2, - ls_hs_config); - else - radeon_set_context_reg(cs, R_028B58_VGT_LS_HS_CONFIG, - ls_hs_config); + if (sctx->last_ls_hs_config != ls_hs_config) { + if (sctx->chip_class >= CIK) { + radeon_set_context_reg_idx(cs, R_028B58_VGT_LS_HS_CONFIG, 2, + ls_hs_config); + } else { + radeon_set_context_reg(cs, R_028B58_VGT_LS_HS_CONFIG, + ls_hs_config); + } + sctx->last_ls_hs_config = ls_hs_config; + } } static unsigned si_num_prims_for_vertices(const struct pipe_draw_info *info) -- 2.30.2