From 73bf669e3fa06af0b00cf4ab321393e5069aa6ab Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 5 Jun 2019 15:03:02 -0700 Subject: [PATCH] panfrost/midgard: Add rounding mode specific opcodes This adds a set of opcodes for performing moves and type conversions with respect to particular rounding modes, required for OpenCL. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/midgard/midgard.h | 27 ++++++++++++++----- .../panfrost/midgard/midgard_compile.c | 18 ++++++------- .../drivers/panfrost/midgard/midgard_ops.c | 24 +++++++++++++---- 3 files changed, 49 insertions(+), 20 deletions(-) diff --git a/src/gallium/drivers/panfrost/midgard/midgard.h b/src/gallium/drivers/panfrost/midgard/midgard.h index 79933973b25..a9b05e8a285 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard.h +++ b/src/gallium/drivers/panfrost/midgard/midgard.h @@ -61,7 +61,10 @@ typedef enum { midgard_alu_op_fmin = 0x28, midgard_alu_op_fmax = 0x2C, - midgard_alu_op_fmov = 0x30, + midgard_alu_op_fmov = 0x30, /* fmov_rte */ + midgard_alu_op_fmov_rtz = 0x31, + midgard_alu_op_fmov_rtn = 0x32, + midgard_alu_op_fmov_rtp = 0x33, midgard_alu_op_froundeven = 0x34, midgard_alu_op_ftrunc = 0x35, midgard_alu_op_ffloor = 0x36, @@ -122,9 +125,15 @@ typedef enum { midgard_alu_op_fbany_neq = 0x91, /* bvec4(0) also */ midgard_alu_op_fbany_lt = 0x92, /* any(lessThan(.., ..)) */ midgard_alu_op_fbany_lte = 0x93, /* any(lessThanEqual(.., ..)) */ - midgard_alu_op_f2i = 0x99, - midgard_alu_op_f2u8 = 0x9C, - midgard_alu_op_f2u = 0x9D, + + midgard_alu_op_f2i_rte = 0x98, + midgard_alu_op_f2i_rtz = 0x99, + midgard_alu_op_f2i_rtn = 0x9A, + midgard_alu_op_f2i_rtp = 0x9B, + midgard_alu_op_f2u_rte = 0x9C, + midgard_alu_op_f2u_rtz = 0x9D, + midgard_alu_op_f2u_rtn = 0x9E, + midgard_alu_op_f2u_rtp = 0x9F, midgard_alu_op_ieq = 0xA0, midgard_alu_op_ine = 0xA1, @@ -145,8 +154,14 @@ typedef enum { midgard_alu_op_ubany_lte = 0xB3, midgard_alu_op_ibany_lt = 0xB4, /* any(lessThan(.., ..)) */ midgard_alu_op_ibany_lte = 0xB5, /* any(lessThanEqual(.., ..)) */ - midgard_alu_op_i2f = 0xB8, - midgard_alu_op_u2f = 0xBC, + midgard_alu_op_i2f_rte = 0xB8, + midgard_alu_op_i2f_rtz = 0xB9, + midgard_alu_op_i2f_rtn = 0xBA, + midgard_alu_op_i2f_rtp = 0xBB, + midgard_alu_op_u2f_rte = 0xBC, + midgard_alu_op_u2f_rtz = 0xBD, + midgard_alu_op_u2f_rtn = 0xBE, + midgard_alu_op_u2f_rtp = 0xBF, midgard_alu_op_icsel_v = 0xC0, /* condition code r31 */ midgard_alu_op_icsel = 0xC1, /* condition code r31.w */ diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index 6dbfd4ade6e..35e0ffd3655 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -752,10 +752,10 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr) ALU_CASE(fexp2, fexp2); ALU_CASE(flog2, flog2); - ALU_CASE(f2i32, f2i); - ALU_CASE(f2u32, f2u); - ALU_CASE(i2f32, i2f); - ALU_CASE(u2f32, u2f); + ALU_CASE(f2i32, f2i_rtz); + ALU_CASE(f2u32, f2u_rtz); + ALU_CASE(i2f32, i2f_rtz); + ALU_CASE(u2f32, u2f_rtz); ALU_CASE(fsin, fsin); ALU_CASE(fcos, fcos); @@ -1123,7 +1123,7 @@ emit_fb_read_blend_scalar(compiler_context *ctx, unsigned reg) .inline_constant = true }, .alu = { - .op = midgard_alu_op_u2f, + .op = midgard_alu_op_u2f_rtz, .reg_mode = midgard_reg_mode_16, .dest_override = midgard_dest_override_none, .mask = 0xF, @@ -2140,12 +2140,12 @@ emit_blend_epilogue(compiler_context *ctx) emit_mir_instruction(ctx, scale); - /* vadd.f2u8.pos.low hr0, hr48, #0 */ + /* vadd.f2u_rte.pos.low hr0, hr48, #0 */ midgard_vector_alu_src alu_src = blank_alu_src; alu_src.half = true; - midgard_instruction f2u8 = { + midgard_instruction f2u_rte = { .type = TAG_ALU_4, .ssa_args = { .src0 = SSA_FIXED_REGISTER(24), @@ -2154,7 +2154,7 @@ emit_blend_epilogue(compiler_context *ctx) .inline_constant = true }, .alu = { - .op = midgard_alu_op_f2u8, + .op = midgard_alu_op_f2u_rte, .reg_mode = midgard_reg_mode_16, .dest_override = midgard_dest_override_lower, .outmod = midgard_outmod_pos, @@ -2164,7 +2164,7 @@ emit_blend_epilogue(compiler_context *ctx) } }; - emit_mir_instruction(ctx, f2u8); + emit_mir_instruction(ctx, f2u_rte); /* vmul.imov.quarter r0, r0, r0 */ diff --git a/src/gallium/drivers/panfrost/midgard/midgard_ops.c b/src/gallium/drivers/panfrost/midgard/midgard_ops.c index 85981dbef5b..3c8535ae09a 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_ops.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_ops.c @@ -46,6 +46,9 @@ struct mir_op_props alu_opcode_props[256] = { [midgard_alu_op_urhadd] = {"urhadd", UNITS_ADD | OP_COMMUTES}, [midgard_alu_op_fmov] = {"fmov", UNITS_ALL | QUIRK_FLIPPED_R24}, + [midgard_alu_op_fmov_rtz] = {"fmov_rtz", UNITS_ALL | QUIRK_FLIPPED_R24}, + [midgard_alu_op_fmov_rtn] = {"fmov_rtn", UNITS_ALL | QUIRK_FLIPPED_R24}, + [midgard_alu_op_fmov_rtp] = {"fmov_rtp", UNITS_ALL | QUIRK_FLIPPED_R24}, [midgard_alu_op_fround] = {"fround", UNITS_ADD}, [midgard_alu_op_froundeven] = {"froundeven", UNITS_ADD}, [midgard_alu_op_ftrunc] = {"ftrunc", UNITS_ADD}, @@ -98,11 +101,22 @@ struct mir_op_props alu_opcode_props[256] = { [midgard_alu_op_fexp2] = {"fexp2", UNIT_VLUT}, [midgard_alu_op_flog2] = {"flog2", UNIT_VLUT}, - [midgard_alu_op_f2i] = {"f2i", UNITS_ADD | OP_TYPE_CONVERT}, - [midgard_alu_op_f2u] = {"f2u", UNITS_ADD | OP_TYPE_CONVERT}, - [midgard_alu_op_f2u8] = {"f2u8", UNITS_ADD | OP_TYPE_CONVERT}, - [midgard_alu_op_i2f] = {"i2f", UNITS_ADD | OP_TYPE_CONVERT}, - [midgard_alu_op_u2f] = {"u2f", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2i_rte] = {"f2i_rte", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2i_rtz] = {"f2i_rtz", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2i_rtn] = {"f2i_rtn", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2i_rtp] = {"f2i_rtp", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2u_rte] = {"f2i_rte", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2u_rtz] = {"f2i_rtz", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2u_rtn] = {"f2i_rtn", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_f2u_rtp] = {"f2i_rtp", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_i2f_rte] = {"i2f", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_i2f_rtz] = {"i2f_rtz", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_i2f_rtn] = {"i2f_rtn", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_i2f_rtp] = {"i2f_rtp", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_u2f_rte] = {"u2f", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_u2f_rtz] = {"u2f_rtz", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_u2f_rtn] = {"u2f_rtn", UNITS_ADD | OP_TYPE_CONVERT}, + [midgard_alu_op_u2f_rtp] = {"u2f_rtp", UNITS_ADD | OP_TYPE_CONVERT}, [midgard_alu_op_fsin] = {"fsin", UNIT_VLUT}, [midgard_alu_op_fcos] = {"fcos", UNIT_VLUT}, -- 2.30.2