From 73d603fe115be523bd7bc95ec38c3a8e42c36902 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 16 Sep 2021 17:06:18 +0100 Subject: [PATCH] moving teststate_check_regs written by klehman into openpower-isa --- src/soc/simple/test/test_core.py | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/src/soc/simple/test/test_core.py b/src/soc/simple/test/test_core.py index 8fdb1fff..9e69f3b4 100644 --- a/src/soc/simple/test/test_core.py +++ b/src/soc/simple/test/test_core.py @@ -11,7 +11,7 @@ from nmigen.back.pysim import Simulator, Delay, Settle from nmutil.formaltest import FHDLTestCase from nmigen.cli import rtlil import unittest -from openpower.test.state import SimState, TestState +from openpower.test.state import SimState, teststate_check_regs from soc.simple.test.teststate import HDLState from openpower.decoder.isa.caller import special_sprs from openpower.decoder.power_decoder import create_pdecode @@ -150,22 +150,6 @@ def setup_regs(pdecode2, core, test): print("oe:", oe, oe_ok) -def teststate_check_regs(dut, states, test, code): - """teststate_check_regs: compares a set of Power ISA objects - to check if they have the same "state" (registers only, at the moment) - """ - slist = [] - # create one TestState per "thing" - for stype, totest in states.items(): - state = yield from TestState(stype, totest, dut, code) - slist.append(state) - # compare each "thing" against the next "thing" in the list. - # (no need to do an O(N^2) comparison here, they *all* have to be the same - for i in range(len(slist)-1): - state, against = slist[i], slist[i+1] - state.compare(against) - - def check_regs(dut, sim, core, test, code): # create the two states and compare testdic = {'sim': sim, 'hdl': core} -- 2.30.2