From 73daacbcd480cf8d8e4750c07a67f441597b5a12 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Wed, 28 Aug 2019 14:07:29 +1000 Subject: [PATCH] Add sim only divw Signed-off-by: Anton Blanchard --- execute1.vhdl | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/execute1.vhdl b/execute1.vhdl index f24ccfb..ae34c1f 100644 --- a/execute1.vhdl +++ b/execute1.vhdl @@ -336,7 +336,14 @@ begin if SIM = true then result := ppc_divwu(e.read_data1, e.read_data2); result_en := 1; - + else + terminate_out <= '1'; + report "illegal"; + end if; + when OP_DIVW => + if SIM = true then + result := ppc_divw(e.read_data1, e.read_data2); + result_en := 1; else terminate_out <= '1'; report "illegal"; -- 2.30.2