From 73eead8350ad474b0a8e38b0f4a0b0d2cbb2a27e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 12 May 2021 13:17:33 +0100 Subject: [PATCH] addcomments for MMU PortInterface test (how it, um, doesnt actually use PortInterface? :) --- src/soc/experiment/test/test_mmu_dcache_pi.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/soc/experiment/test/test_mmu_dcache_pi.py b/src/soc/experiment/test/test_mmu_dcache_pi.py index 46cc5571..ea342ba3 100644 --- a/src/soc/experiment/test/test_mmu_dcache_pi.py +++ b/src/soc/experiment/test/test_mmu_dcache_pi.py @@ -1,3 +1,9 @@ +"""MMU PortInterface Test + +quite basic, goes directly to the MMU to assert signals (does not +yet use PortInterface) +""" + from nmigen import (C, Module, Signal, Elaboratable, Mux, Cat, Repl, Signal) from nmigen.cli import main from nmigen.cli import rtlil -- 2.30.2