From 7420c9dab4aaf87e6b840410226c296c4668a48f Mon Sep 17 00:00:00 2001 From: Chad Versace Date: Wed, 21 Dec 2011 18:34:19 -0800 Subject: [PATCH] i965: Create mock implementation of GL_OES_EGL_image_external In Android IceCreamSandwich, SurfaceFlinger requires GL_OES_image_external for basic compositing tasks. Without the extension, SurfaceFlinger fails to start. Despite the incompleteness of the extension's implementation introduced by this patch, it is good enough to enable SurfaceFlinger and to unblock the people who need to begin testing Mesa on IceCreamSandwich. To enable the extension, set the environment variable MESA_EXTENSION_OVERRIDE="+GL_OES_EGL_image_external". Ideally, Android should set this in init.rc. WARNING: This implementation of GL_OES_EGL_image_external is not complete. Some of it is even incorrect. When we begin to really implement GL_OES_EGL_image_external, much of the patch will need reverting. Reviewed-by: Eric Anholt Signed-off-by: Chad Versace --- src/mesa/drivers/dri/i965/brw_wm_emit.c | 2 ++ src/mesa/drivers/dri/i965/brw_wm_pass1.c | 1 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 1 + src/mesa/drivers/dri/intel/intel_tex_image.c | 2 ++ 4 files changed, 6 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index 80ed1ff956b..270e32142de 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1078,6 +1078,7 @@ void emit_tex(struct brw_wm_compile *c, case TEXTURE_2D_INDEX: case TEXTURE_1D_ARRAY_INDEX: case TEXTURE_RECT_INDEX: + case TEXTURE_EXTERNAL_INDEX: emit = WRITEMASK_XY; nr_texcoords = 2; break; @@ -1212,6 +1213,7 @@ void emit_txb(struct brw_wm_compile *c, break; case TEXTURE_2D_INDEX: case TEXTURE_RECT_INDEX: + case TEXTURE_EXTERNAL_INDEX: brw_MOV(p, brw_message_reg(2 + 0 * mrf_per_channel), arg[0]); brw_MOV(p, brw_message_reg(2 + 1 * mrf_per_channel), arg[1]); brw_MOV(p, brw_message_reg(2 + 2 * mrf_per_channel), brw_imm_f(0)); diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index ee7a627455f..e96e9ed3e8b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -94,6 +94,7 @@ static GLuint get_texcoord_mask( GLuint tex_idx ) return WRITEMASK_X; case TEXTURE_2D_INDEX: case TEXTURE_1D_ARRAY_INDEX: + case TEXTURE_EXTERNAL_INDEX: return WRITEMASK_XY; case TEXTURE_3D_INDEX: case TEXTURE_2D_ARRAY_INDEX: diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index e908430650e..dedf59437c9 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -58,6 +58,7 @@ translate_tex_target(GLenum target) case GL_TEXTURE_2D: case GL_TEXTURE_2D_ARRAY_EXT: + case GL_TEXTURE_EXTERNAL_OES: return BRW_SURFACE_2D; case GL_TEXTURE_3D: diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c index dd0c6d34c63..107d3147279 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_image.c +++ b/src/mesa/drivers/dri/intel/intel_tex_image.c @@ -84,6 +84,8 @@ intel_miptree_create_for_teximage(struct intel_context *intel, intelImage->base.Base.Level == firstLevel && (intel->gen < 4 || firstLevel == 0)) { lastLevel = firstLevel; + } else if (intelObj->base.Target == GL_TEXTURE_EXTERNAL_OES) { + lastLevel = firstLevel; } else { lastLevel = firstLevel + _mesa_logbase2(MAX2(MAX2(width, height), depth)); } -- 2.30.2