From 74212c2414ce04c1331f6c79d74bcc75ea5d4726 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 19 Mar 2018 10:50:40 -0700 Subject: [PATCH] anv,i965,radv,st,ir3: Call nir_lower_deref_instrs This inserts a call to nir_lower_deref_instrs at every call site of glsl_to_nir, spirv_to_nir, and prog_to_nir. Reviewed-by: Caio Marcelo de Oliveira Filho Acked-by: Rob Clark Acked-by: Bas Nieuwenhuizen Acked-by: Dave Airlie Reviewed-by: Kenneth Graunke --- src/amd/vulkan/radv_shader.c | 4 ++++ src/gallium/drivers/freedreno/ir3/ir3_cmdline.c | 3 +++ src/gallium/drivers/freedreno/ir3/ir3_nir.c | 4 +++- src/gallium/drivers/v3d/v3d_program.c | 1 + src/gallium/drivers/vc4/vc4_program.c | 1 + src/intel/blorp/blorp.c | 2 ++ src/intel/vulkan/anv_pipeline.c | 2 ++ src/mesa/drivers/dri/i965/brw_program.c | 8 ++++++-- src/mesa/drivers/dri/i965/brw_tcs.c | 1 + src/mesa/state_tracker/st_glsl_to_nir.cpp | 1 + 10 files changed, 24 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 7a5ade9ec7f..1b6e11f49fe 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -177,6 +177,8 @@ radv_shader_compile_to_nir(struct radv_device *device, assert(exec_list_length(&nir->functions) == 1); struct exec_node *node = exec_list_get_head(&nir->functions); entry_point = exec_node_data(nir_function, node, node); + + NIR_PASS_V(nir, nir_lower_deref_instrs, ~0); } else { uint32_t *spirv = (uint32_t *) module->data; assert(module->size % 4 == 0); @@ -234,6 +236,8 @@ radv_shader_compile_to_nir(struct radv_device *device, free(spec_entries); + NIR_PASS_V(nir, nir_lower_deref_instrs, ~0); + /* We have to lower away local constant initializers right before we * inline functions. That way they get properly initialized at the top * of the function and not at the top of its caller. diff --git a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c index 55809d527ad..ab2fbf618bf 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_cmdline.c @@ -113,6 +113,7 @@ load_glsl(unsigned num_files, char* const* files, gl_shader_stage stage) errx(1, "couldn't parse `%s'", files[0]); nir_shader *nir = glsl_to_nir(prog, stage, ir3_get_compiler_options(compiler)); + nir_lower_deref_instrs(nir, ~0); /* required NIR passes: */ /* TODO cmdline args for some of the conditional lowering passes? */ @@ -232,6 +233,8 @@ load_spirv(const char *filename, const char *entry, gl_shader_stage stage) &spirv_options, ir3_get_compiler_options(compiler)); + NIR_PASS_V(entry_point->shader, nir_lower_deref_instrs, ~0); + nir_print_shader(entry_point->shader, stdout); return entry_point->shader; diff --git a/src/gallium/drivers/freedreno/ir3/ir3_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_nir.c index 9ada3889eb9..990be925833 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_nir.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_nir.c @@ -57,7 +57,9 @@ static const nir_shader_compiler_options options = { struct nir_shader * ir3_tgsi_to_nir(const struct tgsi_token *tokens) { - return tgsi_to_nir(tokens, &options); + struct nir_shader *shader = tgsi_to_nir(tokens, &options); + NIR_PASS_V(shader, nir_lower_deref_instrs, ~0); + return shader; } const nir_shader_compiler_options * diff --git a/src/gallium/drivers/v3d/v3d_program.c b/src/gallium/drivers/v3d/v3d_program.c index ef7dd375bf7..55c6dc071a2 100644 --- a/src/gallium/drivers/v3d/v3d_program.c +++ b/src/gallium/drivers/v3d/v3d_program.c @@ -209,6 +209,7 @@ v3d_shader_state_create(struct pipe_context *pctx, fprintf(stderr, "\n"); } s = tgsi_to_nir(cso->tokens, &v3d_nir_options); + NIR_PASS_V(s, nir_lower_deref_instrs, ~0); so->was_tgsi = true; } diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c index 367613130bb..e4ad329d1b9 100644 --- a/src/gallium/drivers/vc4/vc4_program.c +++ b/src/gallium/drivers/vc4/vc4_program.c @@ -2480,6 +2480,7 @@ vc4_shader_state_create(struct pipe_context *pctx, fprintf(stderr, "\n"); } s = tgsi_to_nir(cso->tokens, &nir_options); + NIR_PASS_V(s, nir_lower_deref_instrs, ~0); } NIR_PASS_V(s, nir_opt_global_to_local); diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 73f8c67802e..58d858dff00 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -204,6 +204,7 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx, */ wm_prog_data->base.binding_table.texture_start = BLORP_TEXTURE_BT_INDEX; + nir_lower_deref_instrs(nir, ~0); nir = brw_preprocess_nir(compiler, nir); nir_remove_dead_variables(nir, nir_var_shader_in); nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); @@ -233,6 +234,7 @@ blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx, nir->options = compiler->glsl_compiler_options[MESA_SHADER_VERTEX].NirOptions; + nir_lower_deref_instrs(nir, ~0); nir = brw_preprocess_nir(compiler, nir); nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 240bde036d6..b454624c37b 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -173,6 +173,8 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline, nir_print_shader(nir, stderr); } + NIR_PASS_V(nir, nir_lower_deref_instrs, ~0); + /* We have to lower away local constant initializers right before we * inline functions. That way they get properly initialized at the top * of the function and not at the top of its caller. diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 959c6122f57..faf706c7d15 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -77,10 +77,13 @@ brw_create_nir(struct brw_context *brw, /* First, lower the GLSL/Mesa IR or SPIR-V to NIR */ if (shader_prog) { - if (shader_prog->data->spirv) + if (shader_prog->data->spirv) { nir = _mesa_spirv_to_nir(ctx, shader_prog, stage, options); - else + nir_lower_deref_instrs(nir, ~0); + } else { nir = glsl_to_nir(shader_prog, stage, options); + nir_lower_deref_instrs(nir, ~0); + } assert (nir); nir_remove_dead_variables(nir, nir_var_shader_in | nir_var_shader_out); @@ -90,6 +93,7 @@ brw_create_nir(struct brw_context *brw, nir_shader_get_entrypoint(nir), true, false); } else { nir = prog_to_nir(prog, options); + nir_lower_deref_instrs(nir, ~0); NIR_PASS_V(nir, nir_lower_regs_to_ssa); /* turn registers into SSA */ } nir_validate_shader(nir); diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c index 931ef64166c..277c5e4c3e8 100644 --- a/src/mesa/drivers/dri/i965/brw_tcs.c +++ b/src/mesa/drivers/dri/i965/brw_tcs.c @@ -109,6 +109,7 @@ create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler, } nir_validate_shader(nir); + nir_lower_deref_instrs(nir, ~0); nir = brw_preprocess_nir(compiler, nir); diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp index d24944c6af5..6d5881084d3 100644 --- a/src/mesa/state_tracker/st_glsl_to_nir.cpp +++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp @@ -376,6 +376,7 @@ st_glsl_to_nir(struct st_context *st, struct gl_program *prog, return prog->nir; nir_shader *nir = glsl_to_nir(shader_program, stage, options); + nir_lower_deref_instrs(nir, (nir_lower_deref_flags)~0); /* Set the next shader stage hint for VS and TES. */ if (!nir->info.separate_shader && -- 2.30.2