From 74266b00112a85660b1e9f6e546f0a2c007dd062 Mon Sep 17 00:00:00 2001
From: Richard Sandiford <richard.sandiford@arm.com>
Date: Fri, 8 Nov 2019 09:43:44 +0000
Subject: [PATCH] Handle POLY_INT_CST in copy_reference_ops_from_ref

2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Handle
	POLY_INT_CST.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general/deref_2.c: New test.
	* gcc.target/aarch64/sve/acle/general/whilele_8.c: Likewise.
	* gcc.target/aarch64/sve/acle/general/whilelt_4.c: Likewise.

From-SVN: r277959
---
 gcc/ChangeLog                                 |  5 +++
 gcc/testsuite/ChangeLog                       |  6 ++++
 .../aarch64/sve/acle/general/deref_2.c        | 20 +++++++++++
 .../aarch64/sve/acle/general/whilele_8.c      | 33 +++++++++++++++++++
 .../aarch64/sve/acle/general/whilelt_4.c      | 33 +++++++++++++++++++
 gcc/tree-ssa-sccvn.c                          |  1 +
 6 files changed, 98 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/deref_2.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilele_8.c
 create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_4.c

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b50456e74fc..d6f516775db 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Handle
+	POLY_INT_CST.
+
 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* tree-inline.c (declare_return_variable): Check for poly_int_tree_p
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9d5702b1c27..7d0d4ef23b0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* gcc.target/aarch64/sve/acle/general/deref_2.c: New test.
+	* gcc.target/aarch64/sve/acle/general/whilele_8.c: Likewise.
+	* gcc.target/aarch64/sve/acle/general/whilelt_4.c: Likewise.
+
 2019-11-08  Richard Sandiford  <richard.sandiford@arm.com>
 
 	* gcc.target/aarch64/sve/acle/general/inline_1.c: New test.
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/deref_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/deref_2.c
new file mode 100644
index 00000000000..08902983199
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/deref_2.c
@@ -0,0 +1,20 @@
+/* { dg-options "-O2" } */
+
+#include <arm_sve.h>
+#include <string.h>
+
+inline void
+copy (void *dst, svbool_t src)
+{
+  memcpy (dst, &src, svcntd ());
+}
+
+uint64_t
+f (int32_t *x, int32_t *y)
+{
+  union { uint64_t x; char c[8]; } u;
+  svbool_t pg = svptrue_b32 ();
+  copy (u.c, svcmpeq (pg, svld1 (pg, x), 0));
+  copy (u.c + 4, svcmpeq (pg, svld1 (pg, y), 1));
+  return u.x;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilele_8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilele_8.c
new file mode 100644
index 00000000000..c7b6663eff2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilele_8.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include <arm_sve.h>
+
+/* { dg-final { scan-assembler-not {\tptrue\t} } } */
+/* { dg-final { scan-assembler-not {\tpfalse\t} } } */
+
+void
+test1 (svbool_t *ptr)
+{
+  *ptr = svwhilele_b32_s32 (-4, 0);
+}
+
+void
+test2 (svbool_t *ptr)
+{
+  *ptr = svwhilele_b16_s64 (svcntb (), svcntb () + 8);
+}
+
+void
+test3 (svbool_t *ptr)
+{
+  *ptr = svwhilele_b64_s32 (0, 2);
+}
+
+void
+test4 (svbool_t *ptr)
+{
+  *ptr = svwhilele_b8_s64 (16, svcntb ());
+}
+
+/* { dg-final { scan-assembler-times {\twhilel[et]\t} 4 } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_4.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_4.c
new file mode 100644
index 00000000000..849cd45c67e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/whilelt_4.c
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+#include <arm_sve.h>
+
+/* { dg-final { scan-assembler-not {\tptrue\t} } } */
+/* { dg-final { scan-assembler-not {\tpfalse\t} } } */
+
+void
+test1 (svbool_t *ptr)
+{
+  *ptr = svwhilelt_b32_s32 (-4, 1);
+}
+
+void
+test2 (svbool_t *ptr)
+{
+  *ptr = svwhilelt_b16_s64 (svcntb (), svcntb () + 9);
+}
+
+void
+test3 (svbool_t *ptr)
+{
+  *ptr = svwhilelt_b64_s32 (0, 3);
+}
+
+void
+test4 (svbool_t *ptr)
+{
+  *ptr = svwhilelt_b8_s64 (16, svcntb ());
+}
+
+/* { dg-final { scan-assembler-times {\twhilel[et]\t} 4 } } */
diff --git a/gcc/tree-ssa-sccvn.c b/gcc/tree-ssa-sccvn.c
index 7465bedb349..f58dbe15047 100644
--- a/gcc/tree-ssa-sccvn.c
+++ b/gcc/tree-ssa-sccvn.c
@@ -928,6 +928,7 @@ copy_reference_ops_from_ref (tree ref, vec<vn_reference_op_s> *result)
 	  break;
 	case STRING_CST:
 	case INTEGER_CST:
+	case POLY_INT_CST:
 	case COMPLEX_CST:
 	case VECTOR_CST:
 	case REAL_CST:
-- 
2.30.2