From 74516d292d8d3a6d2bd0a63c36c09d33665ea92e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 15 May 2023 21:43:41 +0100 Subject: [PATCH] sort out sv.cmp zz (and correct unit tests) --- src/openpower/decoder/power_insn.py | 6 ++---- src/openpower/sv/trans/test_pysvp64dis.py | 8 ++++---- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py index 1e3a2e73..1e909669 100644 --- a/src/openpower/decoder/power_insn.py +++ b/src/openpower/decoder/power_insn.py @@ -2344,14 +2344,12 @@ class CROpFF5RM(FFRc0BaseRM, PredicateBaseRM, VLiBaseRM, DZBaseRM, SZBaseRM, CRO # FIXME: almost everything in this class contradicts the specs (it doesn't) # The modes however are swapped: 5-bit is 3-bit, 3-bit is 5-bit -class CROpFF3RM(FFRc1BaseRM, PredicateBaseRM, VLiBaseRM, CROpBaseRM): +class CROpFF3RM(FFRc1BaseRM, PredicateBaseRM, VLiBaseRM, ZZBaseRM, CROpBaseRM): """cr_op: ffirst 3-bit mode""" - RC1 = 0 # temporary hack VLi: BaseRM[19] inv: BaseRM[21] CR: BaseRM[22, 23] - dz: BaseRM[22] - sz: BaseRM[23] + zz: BaseRM[6] def specifiers(self, record): yield from super().specifiers(record=record, mode="ff") diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py index 273abaff..2fa01642 100644 --- a/src/openpower/sv/trans/test_pysvp64dis.py +++ b/src/openpower/sv/trans/test_pysvp64dis.py @@ -72,7 +72,7 @@ class SVSTATETestCase(unittest.TestCase): expected = [ 'sv.crand *16,*2,*33', 'sv.crand 12,2,33', - 'sv.crand/ff=eq/m=r10 12,2,33', + 'sv.crand/ff=RC1/m=r10 12,2,33', 'sv.crand/m=r10 12,2,33', 'sv.crand/m=r10/sz 12,2,33', 'sv.crand/m=r10/zz 12,2,33', # SHOULD PASS @@ -318,9 +318,9 @@ class SVSTATETestCase(unittest.TestCase): "sv.cmp/ff=eq *4,1,*0,1", "sv.cmp/ff=eq/vli *4,1,*0,1", "sv.cmp/ff=ne *4,1,*0,1", - "sv.cmp/ff=eq/m=r3/sz *4,1,*0,1", - "sv.cmp/dz/ff=lt/m=r3 *4,1,*0,1", - "sv.cmp/dz/ff=gt/m=r3/sz *4,1,*0,1", + "sv.cmp/ff=eq/m=r3/zz *4,1,*0,1", + "sv.cmp/ff=lt/m=r3/zz *4,1,*0,1", + "sv.cmp/ff=gt/m=r3/zz *4,1,*0,1", ] self._do_tst(expected) -- 2.30.2