From 74991d3fce4ab73dccd07859ca8e03b74510465d Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 20 Sep 2022 12:51:28 +0100 Subject: [PATCH] --- openpower/sv/vector_isa_comparison.mdwn | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openpower/sv/vector_isa_comparison.mdwn b/openpower/sv/vector_isa_comparison.mdwn index cbcfe439f..005edc8b3 100644 --- a/openpower/sv/vector_isa_comparison.mdwn +++ b/openpower/sv/vector_isa_comparison.mdwn @@ -76,8 +76,9 @@ SIMD ISAs used features "inspired" from Scalable Vector ISAs. in AVX-512. * ARM NEON - accurately described as a Packed SIMD ISA in all literature. -* ARM SVE / SVE2 - partially accurately described as a Scalable Vector - ISA, but the "Scaling" is, rather unfortunately, a parameter +* ARM SVE / SVE2 - **not a Scalable Vector ISA**, it is actually + a hybrid PackedSIMD/PredicatedSIMD ISA. + The "Scaling" is, rather unfortunately, a parameter that is chosen by the *Hardware Architect*, rather than the programmer. The actual "Scalar" part as far as the programmer is concerned is supposed to be the Predicate Masks. However in -- 2.30.2