From 74d1872d8424c6b227f8d3d0c5e207efe60433cc Mon Sep 17 00:00:00 2001 From: whitequark Date: Thu, 13 Dec 2018 11:25:49 +0000 Subject: [PATCH] fhdl.ir: don't crash propagataing ports in empty fragments. --- nmigen/fhdl/ir.py | 4 ++-- nmigen/test/test_fhdl_ir.py | 8 ++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/nmigen/fhdl/ir.py b/nmigen/fhdl/ir.py index 0945fcb..4676c48 100644 --- a/nmigen/fhdl/ir.py +++ b/nmigen/fhdl/ir.py @@ -131,8 +131,8 @@ class Fragment: def _propagate_ports(self, ports): # Collect all signals we're driving (on LHS of statements), and signals we're using # (on RHS of statements, or in clock domains). - self_driven = union(s._lhs_signals() for s in self.statements) - self_used = union(s._rhs_signals() for s in self.statements) + self_driven = union(s._lhs_signals() for s in self.statements) or ValueSet() + self_used = union(s._rhs_signals() for s in self.statements) or ValueSet() for domain, _ in self.iter_sync(): cd = self.domains[domain] self_used.add(cd.clk) diff --git a/nmigen/test/test_fhdl_ir.py b/nmigen/test/test_fhdl_ir.py index 86cd55a..2bf592b 100644 --- a/nmigen/test/test_fhdl_ir.py +++ b/nmigen/test/test_fhdl_ir.py @@ -13,6 +13,14 @@ class FragmentPortsTestCase(FHDLTestCase): self.c2 = Signal() self.c3 = Signal() + def test_empty(self): + f = Fragment() + + ins, outs = f._propagate_ports(ports=()) + self.assertEqual(ins, ValueSet()) + self.assertEqual(outs, ValueSet()) + self.assertEqual(f.ports, ValueSet()) + def test_self_contained(self): f = Fragment() f.add_statements( -- 2.30.2