From 75666d050dd88b3dc0c1aee7e3b29b91762fcd55 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 3 Mar 2021 13:30:46 +0000 Subject: [PATCH] --- openpower/sv/implementation.mdwn | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/openpower/sv/implementation.mdwn b/openpower/sv/implementation.mdwn index f21049371..ec39b41b0 100644 --- a/openpower/sv/implementation.mdwn +++ b/openpower/sv/implementation.mdwn @@ -113,6 +113,10 @@ This includes adding DMI get/set support in hardware as well as gdb (remote) sup * power-gem5 remote gdb: TODO * TestIssuer: TODO +Links: + +* + ## sv.setvl a [[sv/setvl]] instruction is needed, which also implements [[sv/sprs]] i.e. primarily the `SVSTATE` SPR. the dual-access SPRs for VL and MVL which mirror into the SVSTATE.VL and SVSTATE.MVL fields are not immediately essential to implement. @@ -123,6 +127,8 @@ a [[sv/setvl]] instruction is needed, which also implements [[sv/sprs]] i.e. pri * TestIssuer: TODO * Microwatt: TODO +Links: + ## SVSRR0 for exceptions SV's SVSTATE context is effectively a Sub-PC. On exceptions the PC is saved into SRR0: it should come as no surprise that SVSTATE must be treated exactly the same. SVSRR0 therefore is added to the list to be saved/restored in **exactly** the same way and time as SRR0 and SRR1. This is fundamental and absolutely critical to view SVSTATE as a full peer of PC (CIA, NIA). -- 2.30.2