From 760edf20ba65b2d6b44a6a8c98683e4eb9490009 Mon Sep 17 00:00:00 2001 From: Trevor Saunders Date: Thu, 9 Jul 2015 02:51:09 +0000 Subject: [PATCH] reduce conditional compilation based on AUTO_INC_DEC gcc/ChangeLog: 2015-07-08 Trevor Saunders * auto-inc-dec.c (pass_inc_dec::execute): Don't check the value of AUTO_INC_DEC with the preprocessor. * combine.c (combine_instructions): Likewise. (can_combine_p): Likewise. (try_combine): Likewise. * emit-rtl.c (try_split): Likewise. * loop-invariant.c (calculate_loop_reg_pressure): Likewise. * lower-subreg.c (resolve_simple_move): Likewise. * lra.c (update_inc_notes): Likewise. * recog.c (asm_operand_ok): Likewise. (constrain_operands): Likewise. * regrename.c (scan_rtx_address): Likewise. * reload.c (update_auto_inc_notes): Likewise. (reg_inc_found_and_valid_p): Likewise. * reload1.c (reload): Likewise. (emit_input_reload_insns): Likewise. (delete_output_reload): Likewise. * sched-deps.c (init_insn_reg_pressure_info): Likewise. * valtrack.c (cleanup_auto_inc_dec): Likewise. From-SVN: r225596 --- gcc/ChangeLog | 22 +++++++++++++ gcc/auto-inc-dec.c | 16 +++++----- gcc/combine.c | 73 ++++++++++++++++++++------------------------ gcc/emit-rtl.c | 7 ++--- gcc/loop-invariant.c | 10 +++--- gcc/lower-subreg.c | 30 +++++++++--------- gcc/lra.c | 8 ++--- gcc/recog.c | 13 ++------ gcc/regrename.c | 4 +-- gcc/reload.c | 16 ++++------ gcc/reload1.c | 20 ++++-------- gcc/sched-deps.c | 9 +++--- gcc/valtrack.c | 8 ++--- 13 files changed, 111 insertions(+), 125 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 62d1a9838c5..6ddd1ce78ce 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,25 @@ +2015-07-08 Trevor Saunders + + * auto-inc-dec.c (pass_inc_dec::execute): Don't check the value + of AUTO_INC_DEC with the preprocessor. + * combine.c (combine_instructions): Likewise. + (can_combine_p): Likewise. + (try_combine): Likewise. + * emit-rtl.c (try_split): Likewise. + * loop-invariant.c (calculate_loop_reg_pressure): Likewise. + * lower-subreg.c (resolve_simple_move): Likewise. + * lra.c (update_inc_notes): Likewise. + * recog.c (asm_operand_ok): Likewise. + (constrain_operands): Likewise. + * regrename.c (scan_rtx_address): Likewise. + * reload.c (update_auto_inc_notes): Likewise. + (reg_inc_found_and_valid_p): Likewise. + * reload1.c (reload): Likewise. + (emit_input_reload_insns): Likewise. + (delete_output_reload): Likewise. + * sched-deps.c (init_insn_reg_pressure_info): Likewise. + * valtrack.c (cleanup_auto_inc_dec): Likewise. + 2015-07-08 Trevor Saunders * rtl.h: Always define AUTO_INC_DEC. diff --git a/gcc/auto-inc-dec.c b/gcc/auto-inc-dec.c index 5cab94d036d..f0c9ca3f982 100644 --- a/gcc/auto-inc-dec.c +++ b/gcc/auto-inc-dec.c @@ -116,7 +116,6 @@ along with GCC; see the file COPYING3. If not see before the ref or +c if the increment was after the ref, then if we can do the combination but switch the pre/post bit. */ -#if AUTO_INC_DEC enum form { @@ -1441,8 +1440,6 @@ merge_in_block (int max_reg, basic_block bb) } } -#endif - /* Discover auto-inc auto-dec instructions. */ namespace { @@ -1470,11 +1467,10 @@ public: /* opt_pass methods: */ virtual bool gate (function *) { -#if AUTO_INC_DEC + if (!AUTO_INC_DEC) + return false; + return (optimize > 0 && flag_auto_inc_dec); -#else - return false; -#endif } @@ -1485,7 +1481,9 @@ public: unsigned int pass_inc_dec::execute (function *fun ATTRIBUTE_UNUSED) { -#if AUTO_INC_DEC + if (!AUTO_INC_DEC) + return 0; + basic_block bb; int max_reg = max_reg_num (); @@ -1508,7 +1506,7 @@ pass_inc_dec::execute (function *fun ATTRIBUTE_UNUSED) free (reg_next_def); mem_tmp = NULL; -#endif + return 0; } diff --git a/gcc/combine.c b/gcc/combine.c index 5faa9c86f3b..d68515c2898 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1197,9 +1197,7 @@ combine_instructions (rtx_insn *f, unsigned int nregs) FOR_BB_INSNS (this_basic_block, insn) if (INSN_P (insn) && BLOCK_FOR_INSN (insn)) { -#if AUTO_INC_DEC rtx links; -#endif subst_low_luid = DF_INSN_LUID (insn); subst_insn = insn; @@ -1208,12 +1206,11 @@ combine_instructions (rtx_insn *f, unsigned int nregs) insn); record_dead_and_set_regs (insn); -#if AUTO_INC_DEC - for (links = REG_NOTES (insn); links; links = XEXP (links, 1)) - if (REG_NOTE_KIND (links) == REG_INC) - set_nonzero_bits_and_sign_copies (XEXP (links, 0), NULL_RTX, - insn); -#endif + if (AUTO_INC_DEC) + for (links = REG_NOTES (insn); links; links = XEXP (links, 1)) + if (REG_NOTE_KIND (links) == REG_INC) + set_nonzero_bits_and_sign_copies (XEXP (links, 0), NULL_RTX, + insn); /* Record the current insn_rtx_cost of this instruction. */ if (NONJUMP_INSN_P (insn)) @@ -1792,9 +1789,7 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED, const_rtx set = 0; rtx src, dest; rtx_insn *p; -#if AUTO_INC_DEC rtx link; -#endif bool all_adjacent = true; int (*is_volatile_p) (const_rtx); @@ -2073,22 +2068,21 @@ can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED, Also insist that I3 not be a jump; if it were one and the incremented register were spilled, we would lose. */ -#if AUTO_INC_DEC - for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) - if (REG_NOTE_KIND (link) == REG_INC - && (JUMP_P (i3) - || reg_used_between_p (XEXP (link, 0), insn, i3) - || (pred != NULL_RTX - && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred))) - || (pred2 != NULL_RTX - && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred2))) - || (succ != NULL_RTX - && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (succ))) - || (succ2 != NULL_RTX - && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (succ2))) - || reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i3)))) - return 0; -#endif + if (AUTO_INC_DEC) + for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) + if (REG_NOTE_KIND (link) == REG_INC + && (JUMP_P (i3) + || reg_used_between_p (XEXP (link, 0), insn, i3) + || (pred != NULL_RTX + && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred))) + || (pred2 != NULL_RTX + && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred2))) + || (succ != NULL_RTX + && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (succ))) + || (succ2 != NULL_RTX + && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (succ2))) + || reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i3)))) + return 0; /* Don't combine an insn that follows a CC0-setting insn. An insn that uses CC0 must not be separated from the one that sets it. @@ -3040,20 +3034,19 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0, || GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_DEC))) /* It's not the exception. */ #endif -#if AUTO_INC_DEC - { - rtx link; - for (link = REG_NOTES (i3); link; link = XEXP (link, 1)) - if (REG_NOTE_KIND (link) == REG_INC - && (reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i2)) - || (i1 != 0 - && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i1))))) - { - undo_all (); - return 0; - } - } -#endif + if (AUTO_INC_DEC) + { + rtx link; + for (link = REG_NOTES (i3); link; link = XEXP (link, 1)) + if (REG_NOTE_KIND (link) == REG_INC + && (reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i2)) + || (i1 != 0 + && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i1))))) + { + undo_all (); + return 0; + } + } /* See if the SETs in I1 or I2 need to be kept around in the merged instruction: whenever the value set there is still needed past I3. diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index 1e8825ebb6d..93dd4595ed0 100644 --- a/gcc/emit-rtl.c +++ b/gcc/emit-rtl.c @@ -3588,7 +3588,6 @@ prev_cc0_setter (rtx_insn *insn) return insn; } -#if AUTO_INC_DEC /* Find a RTX_AUTOINC class rtx which matches DATA. */ static int @@ -3604,7 +3603,6 @@ find_auto_inc (const_rtx x, const_rtx reg) } return false; } -#endif /* Increment the label uses for all labels present in rtx. */ @@ -3776,8 +3774,10 @@ try_split (rtx pat, rtx_insn *trial, int last) } break; -#if AUTO_INC_DEC case REG_INC: + if (!AUTO_INC_DEC) + break; + for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn)) { rtx reg = XEXP (note, 0); @@ -3786,7 +3786,6 @@ try_split (rtx pat, rtx_insn *trial, int last) add_reg_note (insn, REG_INC, reg); } break; -#endif case REG_ARGS_SIZE: fixup_args_size_notes (NULL, insn_last, INTVAL (XEXP (note, 0))); diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c index e1f13865423..702f3e32bd7 100644 --- a/gcc/loop-invariant.c +++ b/gcc/loop-invariant.c @@ -1992,11 +1992,11 @@ calculate_loop_reg_pressure (void) note_stores (PATTERN (insn), mark_reg_store, NULL); -#if AUTO_INC_DEC - for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) - if (REG_NOTE_KIND (link) == REG_INC) - mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); -#endif + if (AUTO_INC_DEC) + for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) + if (REG_NOTE_KIND (link) == REG_INC) + mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); + while (n_regs_set-- > 0) { rtx note = find_regno_note (insn, REG_UNUSED, diff --git a/gcc/lower-subreg.c b/gcc/lower-subreg.c index bedfc73715f..f3b2ab5497d 100644 --- a/gcc/lower-subreg.c +++ b/gcc/lower-subreg.c @@ -940,19 +940,19 @@ resolve_simple_move (rtx set, rtx_insn *insn) reg = gen_reg_rtx (orig_mode); -#if AUTO_INC_DEC - { - rtx move = emit_move_insn (reg, src); - if (MEM_P (src)) - { - rtx note = find_reg_note (insn, REG_INC, NULL_RTX); - if (note) - add_reg_note (move, REG_INC, XEXP (note, 0)); - } - } -#else - emit_move_insn (reg, src); -#endif + if (AUTO_INC_DEC) + { + rtx move = emit_move_insn (reg, src); + if (MEM_P (src)) + { + rtx note = find_reg_note (insn, REG_INC, NULL_RTX); + if (note) + add_reg_note (move, REG_INC, XEXP (note, 0)); + } + } + else + emit_move_insn (reg, src); + src = reg; } @@ -1043,15 +1043,13 @@ resolve_simple_move (rtx set, rtx_insn *insn) mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0); minsn = emit_move_insn (real_dest, mdest); -#if AUTO_INC_DEC - if (MEM_P (real_dest) + if (AUTO_INC_DEC && MEM_P (real_dest) && !(resolve_reg_p (real_dest) || resolve_subreg_p (real_dest))) { rtx note = find_reg_note (insn, REG_INC, NULL_RTX); if (note) add_reg_note (minsn, REG_INC, XEXP (note, 0)); } -#endif smove = single_set (minsn); gcc_assert (smove != NULL_RTX); diff --git a/gcc/lra.c b/gcc/lra.c index ce88d8f0e37..cb7013088bc 100644 --- a/gcc/lra.c +++ b/gcc/lra.c @@ -2088,7 +2088,6 @@ has_nonexceptional_receiver (void) return false; } -#if AUTO_INC_DEC /* Process recursively X of INSN and add REG_INC notes if necessary. */ static void @@ -2116,7 +2115,6 @@ add_auto_inc_notes (rtx_insn *insn, rtx x) } } -#endif /* Remove all REG_DEAD and REG_UNUSED notes and regenerate REG_INC. We change pseudos by hard registers without notification of DF and @@ -2143,9 +2141,9 @@ update_inc_notes (void) else pnote = &XEXP (*pnote, 1); } -#if AUTO_INC_DEC - add_auto_inc_notes (insn, PATTERN (insn)); -#endif + + if (AUTO_INC_DEC) + add_auto_inc_notes (insn, PATTERN (insn)); } } diff --git a/gcc/recog.c b/gcc/recog.c index 3e50fa98790..b69ace56c8b 100644 --- a/gcc/recog.c +++ b/gcc/recog.c @@ -1704,9 +1704,7 @@ int asm_operand_ok (rtx op, const char *constraint, const char **constraints) { int result = 0; -#if AUTO_INC_DEC bool incdec_ok = false; -#endif /* Use constrain_operands after reload. */ gcc_assert (!reload_completed); @@ -1774,7 +1772,6 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints) result = 1; break; -#if AUTO_INC_DEC case '<': case '>': /* ??? Before auto-inc-dec, auto inc/dec insns are not supposed @@ -1784,7 +1781,6 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints) Match any memory and hope things are resolved after reload. */ incdec_ok = true; -#endif default: cn = lookup_constraint (constraint); switch (get_constraint_type (cn)) @@ -1828,9 +1824,8 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints) return 0; } -#if AUTO_INC_DEC /* For operands without < or > constraints reject side-effects. */ - if (!incdec_ok && result && MEM_P (op)) + if (AUTO_INC_DEC && !incdec_ok && result && MEM_P (op)) switch (GET_CODE (XEXP (op, 0))) { case PRE_INC: @@ -1843,7 +1838,6 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints) default: break; } -#endif return result; } @@ -2806,9 +2800,8 @@ constrain_operands (int strict, alternative_mask alternatives) = recog_data.operand[funny_match[funny_match_index].this_op]; } -#if AUTO_INC_DEC /* For operands without < or > constraints reject side-effects. */ - if (recog_data.is_asm) + if (AUTO_INC_DEC && recog_data.is_asm) { for (opno = 0; opno < recog_data.n_operands; opno++) if (MEM_P (recog_data.operand[opno])) @@ -2829,7 +2822,7 @@ constrain_operands (int strict, alternative_mask alternatives) break; } } -#endif + return 1; } } diff --git a/gcc/regrename.c b/gcc/regrename.c index 7ad60b6a51a..57c3ad26b9b 100644 --- a/gcc/regrename.c +++ b/gcc/regrename.c @@ -1307,11 +1307,11 @@ scan_rtx_address (rtx_insn *insn, rtx *loc, enum reg_class cl, case PRE_INC: case PRE_DEC: case PRE_MODIFY: -#if !AUTO_INC_DEC /* If the target doesn't claim to handle autoinc, this must be something special, like a stack push. Kill this chain. */ + if (!AUTO_INC_DEC) action = mark_all_read; -#endif + break; case MEM: diff --git a/gcc/reload.c b/gcc/reload.c index 3b6df378f16..a670f13b72b 100644 --- a/gcc/reload.c +++ b/gcc/reload.c @@ -5447,14 +5447,13 @@ static void update_auto_inc_notes (rtx_insn *insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED, int reloadnum ATTRIBUTE_UNUSED) { -#if AUTO_INC_DEC - rtx link; + if (!AUTO_INC_DEC) + return; - for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) + for (rtx link = REG_NOTES (insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_INC && (int) REGNO (XEXP (link, 0)) == regno) push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); -#endif } /* Record the pseudo registers we must reload into hard registers in a @@ -7168,13 +7167,15 @@ find_inc_amount (rtx x, rtx inced) /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a REG_INC note in insn INSN. REGNO must refer to a hard register. */ -#if AUTO_INC_DEC static int reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno, rtx insn) { rtx link; + if (!AUTO_INC_DEC) + return 0; + gcc_assert (insn); if (! INSN_P (insn)) @@ -7189,11 +7190,6 @@ reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno, } return 0; } -#else - -#define reg_inc_found_and_valid_p(regno,endregno,insn) 0 - -#endif /* Return 1 if register REGNO is the subject of a clobber in insn INSN. If SETS is 1, also consider SETs. If SETS is 2, enable checking diff --git a/gcc/reload1.c b/gcc/reload1.c index 8c3e6e82a43..956f0eb2a1b 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -417,9 +417,7 @@ static void delete_output_reload (rtx_insn *, int, int, rtx); static void delete_address_reloads (rtx_insn *, rtx_insn *); static void delete_address_reloads_1 (rtx_insn *, rtx, rtx_insn *); static void inc_for_reload (rtx, rtx, rtx, int); -#if AUTO_INC_DEC static void add_auto_inc_notes (rtx_insn *, rtx); -#endif static void substitute (rtx *, const_rtx, rtx); static bool gen_reload_chain_without_interm_reg_p (int, int); static int reloads_conflict (int, int); @@ -1250,9 +1248,8 @@ reload (rtx_insn *first, int global) pnote = &XEXP (*pnote, 1); } -#if AUTO_INC_DEC - add_auto_inc_notes (insn, PATTERN (insn)); -#endif + if (AUTO_INC_DEC) + add_auto_inc_notes (insn, PATTERN (insn)); /* Simplify (subreg (reg)) if it appears as an operand. */ cleanup_subreg_operands (insn); @@ -7397,10 +7394,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl, is ill-formed and we must reject this optimization. */ extract_insn (temp); if (constrain_operands (1, get_enabled_alternatives (temp)) -#if AUTO_INC_DEC - && ! find_reg_note (temp, REG_INC, reloadreg) -#endif - ) + && (!AUTO_INC_DEC || ! find_reg_note (temp, REG_INC, reloadreg))) { /* If the previous insn is an output reload, the source is a reload register, and its spill_reg_store entry will @@ -8870,10 +8864,10 @@ delete_output_reload (rtx_insn *insn, int j, int last_reload_reg, continue; if (MEM_P (reg2) || reload_override_in[k]) reg2 = rld[k].in_reg; -#if AUTO_INC_DEC - if (rld[k].out && ! rld[k].out_reg) + + if (AUTO_INC_DEC && rld[k].out && ! rld[k].out_reg) reg2 = XEXP (rld[k].in_reg, 0); -#endif + while (GET_CODE (reg2) == SUBREG) reg2 = SUBREG_REG (reg2); if (rtx_equal_p (reg2, reg)) @@ -9266,7 +9260,6 @@ inc_for_reload (rtx reloadreg, rtx in, rtx value, int inc_amount) } } -#if AUTO_INC_DEC static void add_auto_inc_notes (rtx_insn *insn, rtx x) { @@ -9291,4 +9284,3 @@ add_auto_inc_notes (rtx_insn *insn, rtx x) add_auto_inc_notes (insn, XVECEXP (x, i, j)); } } -#endif diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c index d13655a4d9c..e3f48da4420 100644 --- a/gcc/sched-deps.c +++ b/gcc/sched-deps.c @@ -2222,11 +2222,10 @@ init_insn_reg_pressure_info (rtx_insn *insn) note_stores (PATTERN (insn), mark_insn_reg_store, insn); -#if AUTO_INC_DEC - for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) - if (REG_NOTE_KIND (link) == REG_INC) - mark_insn_reg_store (XEXP (link, 0), NULL_RTX, insn); -#endif + if (AUTO_INC_DEC) + for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) + if (REG_NOTE_KIND (link) == REG_INC) + mark_insn_reg_store (XEXP (link, 0), NULL_RTX, insn); for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) if (REG_NOTE_KIND (link) == REG_DEAD) diff --git a/gcc/valtrack.c b/gcc/valtrack.c index 67dfd2b4ccc..3dfefc9fc2e 100644 --- a/gcc/valtrack.c +++ b/gcc/valtrack.c @@ -54,7 +54,9 @@ static rtx cleanup_auto_inc_dec (rtx src, machine_mode mem_mode ATTRIBUTE_UNUSED) { rtx x = src; -#if AUTO_INC_DEC + if (!AUTO_INC_DEC) + return copy_rtx (x); + const RTX_CODE code = GET_CODE (x); int i; const char *fmt; @@ -137,10 +139,6 @@ cleanup_auto_inc_dec (rtx src, machine_mode mem_mode ATTRIBUTE_UNUSED) = cleanup_auto_inc_dec (XVECEXP (src, i, j), mem_mode); } -#else /* !AUTO_INC_DEC */ - x = copy_rtx (x); -#endif /* !AUTO_INC_DEC */ - return x; } -- 2.30.2