From 7613c09b6f9c6debe7353e3db749688f223fdb59 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 11 Sep 2019 15:43:23 +0100 Subject: [PATCH] whitespace --- zfpacc_proposal.mdwn | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/zfpacc_proposal.mdwn b/zfpacc_proposal.mdwn index 284a42db2..f7e4fa559 100644 --- a/zfpacc_proposal.mdwn +++ b/zfpacc_proposal.mdwn @@ -7,10 +7,11 @@ TODO: complete writeup Zfpacc: a proposal to allow implementations to dynamically set the bit-accuracy of floating-point results, trading speed (reduced latency) -*at runtime* for accuracy (higher latency). IEE754 format is preserved -(instruction requirements unmodified): only ULP (Unit in Last Place) -of the instruction result is permitted to meet alternative accuracy -requirements. +*at runtime* for accuracy (higher latency). IEEE754 format is preserved: +instruction operand and result format requirements are unmodified by +this proposal. Only ULP (Unit in Last Place) of the instruction *result* +is permitted to meet alternative accuracy requirements, whilst still +retaining the instruction's requested format. # Extension of FCSR -- 2.30.2