From 772e7ebedefdf434447b221a7e43abd66d348a40 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sun, 12 Jun 2022 20:12:43 +0100
Subject: [PATCH]

---
 openpower/sv/mv.swizzle.mdwn | 43 ++++++++++++------------------------
 1 file changed, 14 insertions(+), 29 deletions(-)

diff --git a/openpower/sv/mv.swizzle.mdwn b/openpower/sv/mv.swizzle.mdwn
index f867e1874..d41944e1d 100644
--- a/openpower/sv/mv.swizzle.mdwn
+++ b/openpower/sv/mv.swizzle.mdwn
@@ -143,41 +143,27 @@ permitted
 to be serviced. Out-of-Order Micro-architectures may of course cancel
 the in-flight instruction as usual if the Interrupt requires fast servicing.
 
-Determining the source and destination subvector lengths is tricky
-because of the built-in static predicate mask.
-Swizzle Pseudocode (when SRC_SUBVL=SUBVL):
+Determining the source and destination subvector lengths is tricky.
+Swizzle Pseudocode:
 
 ```
     swiz[0] = imm[0:3]   # X
     swiz[1] = imm[3:6]   # Y
     swiz[2] = imm[6:9]   # Z
-    swiz[3] = imm[9:12]  # W
-    # determine implied subvector length from Swizzle
-    for i in range(4):
-        if swiz[i] != 0b000: subvlen = i+1
-    source_subvl = subvlen
-    dest_subvl = SUBVL
+    swiz[3] = imm[9:12]  # W, maybe
+    # determine Subvector lengths
+    subvl = MAX(SRC_SUBVL, SUBVL)
+    if subvl == 4:
+        src_subvl = 4
+    else:
+        src_subvl = swiz[3]
+    dest_subvl = subvl
 ```
 
 What is going on here is that the option is provided to have different
 source and destination subvector lengths, by exploiting redundancy in
 the Swizzle Immediate.
 
-Example 1:
-
-A SUBVL of 2 with a Swizzle "ZW00" (or anything
-in the top 2 swizzle positions) allows for copying any two elements
-from a vec4 into a vec2.
-
-Example 2:
-
-A SUBVL of 2 with a Swizzle "XX0." allows for copying from a vec3
-to a vec2
-
-Example 3:
-
-A SUBVL of 3 with a Swizzle "YX.." allows a vec2 to be copied to a vec3
-
 # RM Mode Concept:
 
 MVRM-2P-2S1D:
@@ -233,8 +219,7 @@ The two Finite State Machines for the generation of the source
 and destination element offsets progress incrementally in
 lock-step.
 
-Although not prohibited, it is not expected that
-Software would set both source and destination SUBVL at the
-same time.  Usually, either `SRC_SUBVL=1, SUBVL=2/3/4` to give
-a "pack" effect, or `SUBVL=1, SRC_SUBVL=2/3/4` to give an
-"unpack".
+Ether `SRC_SUBVL=1, SUBVL=2/3/4` gives
+a "pack" effect, and `SUBVL=1, SRC_SUBVL=2/3/4` gives an
+"unpack".  Setting both SUBVL and SRC_SUBVL to greater than
+1 is `UNDEFINED`.
-- 
2.30.2