From 7737f56544160193bae979d28da8801ab0e5e1cd Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Wed, 28 Mar 2018 01:50:17 -0700 Subject: [PATCH] anv/gen12: Write GFX_AUX_TABLE base address register Signed-off-by: Jordan Justen Reviewed-by: Lionel Landwerlin --- src/intel/vulkan/anv_genX.h | 2 ++ src/intel/vulkan/anv_private.h | 1 + src/intel/vulkan/genX_blorp_exec.c | 4 ++++ src/intel/vulkan/genX_cmd_buffer.c | 37 ++++++++++++++++++++++++++++++ 4 files changed, 44 insertions(+) diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h index 06c6b467acf..0274fe8b3a8 100644 --- a/src/intel/vulkan/anv_genX.h +++ b/src/intel/vulkan/anv_genX.h @@ -54,6 +54,8 @@ void genX(flush_pipeline_select_gpgpu)(struct anv_cmd_buffer *cmd_buffer); void genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer, const struct gen_l3_config *cfg); +void genX(cmd_buffer_aux_map_state)(struct anv_cmd_buffer *cmd_buffer); + void genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer); void genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer); diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 33614bb9426..7e83db04346 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2414,6 +2414,7 @@ struct anv_cmd_state { /* PIPELINE_SELECT.PipelineSelection */ uint32_t current_pipeline; const struct gen_l3_config * current_l3_config; + uint32_t last_aux_map_state; struct anv_cmd_graphics_state gfx; struct anv_cmd_compute_state compute; diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c index 239bfb47433..9c754f7318e 100644 --- a/src/intel/vulkan/genX_blorp_exec.c +++ b/src/intel/vulkan/genX_blorp_exec.c @@ -255,6 +255,10 @@ genX(blorp_exec)(struct blorp_batch *batch, genX(flush_pipeline_select_3d)(cmd_buffer); +#if GEN_GEN >= 12 + genX(cmd_buffer_aux_map_state)(cmd_buffer); +#endif + genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer); /* BLORP doesn't do anything fancy with depth such as discards, so we want diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index ff9c6c79eb9..ced99939f75 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -29,6 +29,7 @@ #include "vk_util.h" #include "util/fast_idiv_by_const.h" +#include "common/gen_aux_map.h" #include "common/gen_l3_config.h" #include "genxml/gen_macros.h" #include "genxml/genX_pack.h" @@ -2660,6 +2661,34 @@ cmd_buffer_flush_push_constants(struct anv_cmd_buffer *cmd_buffer, cmd_buffer->state.push_constants_dirty &= ~flushed; } +#if GEN_GEN >= 12 +void +genX(cmd_buffer_aux_map_state)(struct anv_cmd_buffer *cmd_buffer) +{ + void *aux_map_ctx = cmd_buffer->device->aux_map_ctx; + if (!aux_map_ctx) + return; + uint32_t aux_map_state_num = gen_aux_map_get_state_num(aux_map_ctx); + if (cmd_buffer->state.last_aux_map_state != aux_map_state_num) { + /* If the aux-map state number increased, then we need to rewrite the + * register. Rewriting the register is used to both set the aux-map + * translation table address, and also to invalidate any previously + * cached translations. + */ + uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx); + anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), lri) { + lri.RegisterOffset = GENX(GFX_AUX_TABLE_BASE_ADDR_num); + lri.DataDWord = base_addr & 0xffffffff; + } + anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), lri) { + lri.RegisterOffset = GENX(GFX_AUX_TABLE_BASE_ADDR_num) + 4; + lri.DataDWord = base_addr >> 32; + } + cmd_buffer->state.last_aux_map_state = aux_map_state_num; + } +} +#endif + void genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer) { @@ -2678,6 +2707,10 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer *cmd_buffer) genX(flush_pipeline_select_3d)(cmd_buffer); +#if GEN_GEN >= 12 + genX(cmd_buffer_aux_map_state)(cmd_buffer); +#endif + if (vb_emit) { const uint32_t num_buffers = __builtin_popcount(vb_emit); const uint32_t num_dwords = 1 + num_buffers * 4; @@ -3544,6 +3577,10 @@ genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer) genX(flush_pipeline_select_gpgpu)(cmd_buffer); +#if GEN_GEN >= 12 + genX(cmd_buffer_aux_map_state)(cmd_buffer); +#endif + if (cmd_buffer->state.compute.pipeline_dirty) { /* From the Sky Lake PRM Vol 2a, MEDIA_VFE_STATE: * -- 2.30.2