From 773acd542802a69b96e00dd82b6e210de564f553 Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Fri, 10 Feb 2017 17:59:51 +0100 Subject: [PATCH] testsuite, rs6000: fold-vec-mult-longlong.c On 32-bit we of course do not generate mulld insns. This patch makes the testcase only do the scan-assembler on 64-bit targets. gcc/testsuite/ * gcc.target/powerpc/fold-vec-mult-longlong.c: Don't do the scan-assembler unless lp64. From-SVN: r245338 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dbe8d99910b..a143d7c4443 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-02-10 Segher Boessenkool + + * gcc.target/powerpc/fold-vec-mult-longlong.c: Don't do the + scan-assembler unless lp64. + 2017-02-10 Segher Boessenkool PR tree-optimization/66612 diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c index 0e5da6c2faf..38dba9f5023 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c @@ -20,5 +20,5 @@ test6 (vector unsigned long long x, vector unsigned long long y) return vec_mul (x, y); } -/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 } } */ +/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */ -- 2.30.2