From 776822d147461d6fc6fbcb43c84dfb2ea8552641 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Mon, 7 Dec 2020 17:43:58 -0800 Subject: [PATCH] cpu: Track flat register indices in the Minor CPU with a vector. That avoids having to know the maximum number of dest registers there can be in any instruction, and will likely not affect the performance of the Minor CPU overall. Change-Id: I4e49695ba06365d52eb4ce128d5cbb30db665bd7 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38387 Tested-by: kokoro Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini --- src/cpu/minor/decode.cc | 4 ++-- src/cpu/minor/dyn_inst.cc | 2 +- src/cpu/minor/dyn_inst.hh | 11 ++++++----- src/cpu/minor/fetch2.cc | 17 +++++++++-------- 4 files changed, 18 insertions(+), 16 deletions(-) diff --git a/src/cpu/minor/decode.cc b/src/cpu/minor/decode.cc index 136099a1c..a88af21df 100644 --- a/src/cpu/minor/decode.cc +++ b/src/cpu/minor/decode.cc @@ -182,9 +182,9 @@ Decode::evaluate() static_inst->fetchMicroop( decode_info.microopPC.microPC()); - output_inst = new MinorDynInst(inst->id); + output_inst = + new MinorDynInst(static_micro_inst, inst->id); output_inst->pc = decode_info.microopPC; - output_inst->staticInst = static_micro_inst; output_inst->fault = NoFault; /* Allow a predicted next address only on the last diff --git a/src/cpu/minor/dyn_inst.cc b/src/cpu/minor/dyn_inst.cc index 5a08da83e..87234885d 100644 --- a/src/cpu/minor/dyn_inst.cc +++ b/src/cpu/minor/dyn_inst.cc @@ -79,7 +79,7 @@ void MinorDynInst::init() { if (!bubbleInst) { - bubbleInst = new MinorDynInst(); + bubbleInst = new MinorDynInst(StaticInst::nullStaticInstPtr); assert(bubbleInst->isBubble()); /* Make bubbleInst immortal */ bubbleInst->incref(); diff --git a/src/cpu/minor/dyn_inst.hh b/src/cpu/minor/dyn_inst.hh index 0328544d1..e84ae63f8 100644 --- a/src/cpu/minor/dyn_inst.hh +++ b/src/cpu/minor/dyn_inst.hh @@ -162,7 +162,7 @@ class MinorDynInst : public RefCounted static MinorDynInstPtr bubbleInst; public: - StaticInstPtr staticInst; + const StaticInstPtr staticInst; InstId id; @@ -229,17 +229,18 @@ class MinorDynInst : public RefCounted /** Flat register indices so that, when clearing the scoreboard, we * have the same register indices as when the instruction was marked * up */ - RegId flatDestRegIdx[TheISA::MaxInstDestRegs]; + std::vector flatDestRegIdx; public: - MinorDynInst(InstId id_ = InstId(), Fault fault_ = NoFault) : - staticInst(NULL), id(id_), traceData(NULL), + MinorDynInst(StaticInstPtr si, InstId id_=InstId(), Fault fault_=NoFault) : + staticInst(si), id(id_), traceData(NULL), pc(TheISA::PCState(0)), fault(fault_), triedToPredict(false), predictedTaken(false), fuIndex(0), inLSQ(false), translationFault(NoFault), inStoreBuffer(false), canEarlyIssue(false), predicate(true), memAccPredicate(true), instToWaitFor(0), extraCommitDelay(Cycles(0)), - extraCommitDelayExpr(NULL), minimumCommitCycle(Cycles(0)) + extraCommitDelayExpr(NULL), minimumCommitCycle(Cycles(0)), + flatDestRegIdx(si ? si->numDestRegs() : 0) { } public: diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc index 08c280ab9..648ac6d0a 100644 --- a/src/cpu/minor/fetch2.cc +++ b/src/cpu/minor/fetch2.cc @@ -356,7 +356,8 @@ Fetch2::evaluate() /* Make a new instruction and pick up the line, stream, * prediction, thread ids from the incoming line */ - dyn_inst = new MinorDynInst(line_in->id); + dyn_inst = new MinorDynInst( + StaticInst::nullStaticInstPtr, line_in->id); /* Fetch and prediction sequence numbers originate here */ dyn_inst->id.fetchSeqNum = fetch_info.fetchSeqNum; @@ -393,9 +394,15 @@ Fetch2::evaluate() * instructions longer than sizeof(MachInst) */ if (decoder->instReady()) { + /* Note that the decoder can update the given PC. + * Remember not to assign it until *after* calling + * decode */ + StaticInstPtr decoded_inst = + decoder->decode(fetch_info.pc); + /* Make a new instruction and pick up the line, stream, * prediction, thread ids from the incoming line */ - dyn_inst = new MinorDynInst(line_in->id); + dyn_inst = new MinorDynInst(decoded_inst, line_in->id); /* Fetch and prediction sequence numbers originate here */ dyn_inst->id.fetchSeqNum = fetch_info.fetchSeqNum; @@ -404,12 +411,6 @@ Fetch2::evaluate() * has not been set */ assert(dyn_inst->id.execSeqNum == 0); - /* Note that the decoder can update the given PC. - * Remember not to assign it until *after* calling - * decode */ - StaticInstPtr decoded_inst = decoder->decode(fetch_info.pc); - dyn_inst->staticInst = decoded_inst; - dyn_inst->pc = fetch_info.pc; DPRINTF(Fetch, "decoder inst %s\n", *dyn_inst); -- 2.30.2