From 777a92d004207cd2bca060089ad9972f47a7b703 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 20 Nov 2020 23:49:05 +0000
Subject: [PATCH]

---
 openpower/sv/vector_swizzle.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openpower/sv/vector_swizzle.mdwn b/openpower/sv/vector_swizzle.mdwn
index c04c8644a..0e2b61829 100644
--- a/openpower/sv/vector_swizzle.mdwn
+++ b/openpower/sv/vector_swizzle.mdwn
@@ -27,7 +27,7 @@ There is also benefit to encoding some useful immediates into src operands, on a
 * However index selection is 2 bits per element
 * Therefore the src SUBVL must be separate and distinct from the dest SUBVL
 
-# Predication mixed with immediates and indices
+## Predication mixed with immediates and indices
 
 * Three bits per element.
 * One encoding (0b000) indicates "mask"
-- 
2.30.2