From 77d4eec3b3f6ba634dcf62780e4329ea02ac9b2d Mon Sep 17 00:00:00 2001 From: R Veera Kumar Date: Mon, 28 Mar 2022 16:15:00 +0530 Subject: [PATCH] Changed CH02-44.png to asic_iopad_gen.svg image --- docs/pinmux.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn index 17429715e..0ad09eb5e 100644 --- a/docs/pinmux.mdwn +++ b/docs/pinmux.mdwn @@ -18,7 +18,7 @@ out-enable) to be routed right the way from the ASIC, all the way to the IO PAD, where only then does a wire bond connect it to a single external pin. -[[!img CH02-44.gif]] +[[!img asic_iopad_gen.svg]] Designing an ASIC, there is no guarantee that the IO pad is working when manufactured. Worse, the peripheral could be -- 2.30.2