From 77f2390b4819b16b05f79d3d00a94647f9bc831a Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 8 Sep 2022 17:56:06 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index cd106f017..3aeb65859 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -1,5 +1,3 @@ -[[!tag opf_rfc]] - # OpenPOWER Foundation External RFC LS001 Links @@ -237,7 +235,7 @@ Transcendentals are required: * QTY 33of X-Form "1-argument" (fsin, fsins, fcos, fcoss) * QTY 15of X-Form "2-argument" (pow, atan2, fhypot) --- +[[!tag opf_rfc]] [^extend]: Prefix opcode space **must** be reserved in advance to do so, in order to avoid the catastrophic binary-incompatibility mistake made by RISC-V RVV and ARM SVE/2 [^likeext001]: SVP64-Single is remarkably similar to the "bit 1" of EXT001 being set to indicate that the 64-bits is to be allocated in full to a new encoding, but in fact it still embeds v3.0 Scalar operations. -- 2.30.2