From 781e6f76683d17b29125d28f52be00151321b772 Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Wed, 21 Dec 1994 13:56:02 -0500 Subject: [PATCH] (mulhisi3): Add truncate to mulhisi3 to fix bug and change from define_insn to... (mulhisi3): Add truncate to mulhisi3 to fix bug and change from define_insn to define_expand to survive register presssure. From-SVN: r8683 --- gcc/config/pdp11/pdp11.md | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md index f1fc810b761..10673c78224 100644 --- a/gcc/config/pdp11/pdp11.md +++ b/gcc/config/pdp11/pdp11.md @@ -1670,14 +1670,34 @@ [(set_attr "length" "1,2")]) ;; 32 bit result -(define_insn "mulhisi3" +(define_expand "mulhisi3" + [(set (match_dup 3) + (match_operand:HI 1 "general_operand" "g,g")) + (set (match_operand:SI 0 "register_operand" "=r,r") ; even numbered! + (mult:SI (truncate:HI + (match_dup 0)) + (match_operand:HI 2 "general_operand" "rR,Qi")))] + "TARGET_45" + "operands[3] = gen_lowpart(HImode, operands[1]);") + +(define_insn "" [(set (match_operand:SI 0 "register_operand" "=r,r") ; even numbered! - (mult:SI (match_operand:HI 1 "register_operand" "%0,0") + (mult:SI (truncate:HI + (match_operand:SI 1 "register_operand" "%0,0")) (match_operand:HI 2 "general_operand" "rR,Qi")))] "TARGET_45" "mul %2, %0" [(set_attr "length" "1,2")]) +;(define_insn "mulhisi3" +; [(set (match_operand:SI 0 "register_operand" "=r,r") ; even numbered! +; (mult:SI (truncate:HI +; (match_operand:SI 1 "register_operand" "%0,0")) +; (match_operand:HI 2 "general_operand" "rR,Qi")))] +; "TARGET_45" +; "mul %2, %0" +; [(set_attr "length" "1,2")]) + ;;- divide ;; how can I use the remainder ? - ;; modsidi and move upper register to lower ???? -- 2.30.2