From 7874b7c5b59923d8a56eaf41f7518c71b910355e Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Thu, 22 Feb 2018 21:17:51 +0000 Subject: [PATCH] re PR target/81572 (gcc-7 regression: unnecessary vector regmove on compare) 2018-02-22 Vladimir Makarov PR target/81572 * lra-int.h (LRA_UNKNOWN_ALT, LRA_NON_CLOBBERED_ALT): New macros. * lra.c (lra_set_insn_recog_data, lra_update_insn_recog_data): Use LRA_UNKNOWN_ALT. * lra-constraints.c (curr_insn_transform): Set up LRA_NON_CLOBBERED_ALT for moves processed on the fast path. Use LRA_UNKNOWN_ALT. (remove_inheritance_pseudos): Use LRA_UNKNOWN_ALT. * lra-eliminations.c (spill_pseudos): Ditto. (process_insn_for_elimination): Ditto. * lra-lives.c (reg_early_clobber_p): Use the new macros. * lra-spills.c (spill_pseudos): Use LRA_UNKNOWN_ALT and LRA_NON_CLOBBERED_ALT. 2018-02-22 Vladimir Makarov PR target/81572 * gcc.target/powerpc/pr81572.c: New. From-SVN: r257915 --- gcc/ChangeLog | 16 ++++++++++++++++ gcc/lra-constraints.c | 16 +++++++++++----- gcc/lra-eliminations.c | 4 ++-- gcc/lra-int.h | 11 ++++++++--- gcc/lra-lives.c | 4 +++- gcc/lra-spills.c | 2 +- gcc/lra.c | 4 ++-- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/powerpc/pr81572.c | 13 +++++++++++++ 9 files changed, 61 insertions(+), 14 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr81572.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9e737edec02..fd0745d297a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2018-02-22 Vladimir Makarov + + PR target/81572 + * lra-int.h (LRA_UNKNOWN_ALT, LRA_NON_CLOBBERED_ALT): New macros. + * lra.c (lra_set_insn_recog_data, lra_update_insn_recog_data): Use + LRA_UNKNOWN_ALT. + * lra-constraints.c (curr_insn_transform): Set up + LRA_NON_CLOBBERED_ALT for moves processed on the fast path. Use + LRA_UNKNOWN_ALT. + (remove_inheritance_pseudos): Use LRA_UNKNOWN_ALT. + * lra-eliminations.c (spill_pseudos): Ditto. + (process_insn_for_elimination): Ditto. + * lra-lives.c (reg_early_clobber_p): Use the new macros. + * lra-spills.c (spill_pseudos): Use LRA_UNKNOWN_ALT and + LRA_NON_CLOBBERED_ALT. + 2018-02-22 Martin Sebor PR tree-optimization/84480 diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index d730f36fba0..59b97540d98 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -3730,7 +3730,13 @@ curr_insn_transform (bool check_only_p) curr_insn_set = single_set (curr_insn); if (curr_insn_set != NULL_RTX && simple_move_p ()) - return false; + { + /* We assume that the corresponding insn alternative has no + earlier clobbers. If it is not the case, don't define move + cost equal to 2 for the corresponding register classes. */ + lra_set_used_insn_alternative (curr_insn, LRA_NON_CLOBBERED_ALT); + return false; + } no_input_reloads_p = no_output_reloads_p = false; goal_alt_number = -1; @@ -3838,7 +3844,7 @@ curr_insn_transform (bool check_only_p) if (change_p) /* If we've changed the instruction then any alternative that we chose previously may no longer be valid. */ - lra_set_used_insn_alternative (curr_insn, -1); + lra_set_used_insn_alternative (curr_insn, LRA_UNKNOWN_ALT); if (! check_only_p && curr_insn_set != NULL_RTX && check_and_process_move (&change_p, &sec_mem_p)) @@ -3846,7 +3852,7 @@ curr_insn_transform (bool check_only_p) try_swapped: - reused_alternative_num = check_only_p ? -1 : curr_id->used_insn_alternative; + reused_alternative_num = check_only_p ? LRA_UNKNOWN_ALT : curr_id->used_insn_alternative; if (lra_dump_file != NULL && reused_alternative_num >= 0) fprintf (lra_dump_file, "Reusing alternative %d for insn #%u\n", reused_alternative_num, INSN_UID (curr_insn)); @@ -6752,7 +6758,7 @@ remove_inheritance_pseudos (bitmap remove_pseudos) } lra_push_insn_and_update_insn_regno_info (curr_insn); lra_set_used_insn_alternative_by_uid - (INSN_UID (curr_insn), -1); + (INSN_UID (curr_insn), LRA_UNKNOWN_ALT); done_p = true; if (lra_dump_file != NULL) { @@ -6791,7 +6797,7 @@ remove_inheritance_pseudos (bitmap remove_pseudos) constraints pass. */ lra_push_insn_and_update_insn_regno_info (curr_insn); lra_set_used_insn_alternative_by_uid - (INSN_UID (curr_insn), -1); + (INSN_UID (curr_insn), LRA_UNKNOWN_ALT); } else if (restored_regs_p) /* The instruction has been restored to the form that diff --git a/gcc/lra-eliminations.c b/gcc/lra-eliminations.c index 44ad96af38d..21d8d5f8018 100644 --- a/gcc/lra-eliminations.c +++ b/gcc/lra-eliminations.c @@ -1175,7 +1175,7 @@ spill_pseudos (HARD_REG_SET set) if (bitmap_bit_p (&to_process, INSN_UID (insn))) { lra_push_insn (insn); - lra_set_used_insn_alternative (insn, -1); + lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); } bitmap_clear (&to_process); } @@ -1408,7 +1408,7 @@ process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p) } lra_update_insn_regno_info (insn); lra_push_insn (insn); - lra_set_used_insn_alternative (insn, -1); + lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); } } diff --git a/gcc/lra-int.h b/gcc/lra-int.h index 662bc4c14ed..03839187cf6 100644 --- a/gcc/lra-int.h +++ b/gcc/lra-int.h @@ -202,15 +202,20 @@ struct lra_static_insn_data const struct operand_alternative *operand_alternative; }; +/* Negative insn alternative numbers used for special cases. */ +#define LRA_UNKNOWN_ALT -1 +#define LRA_NON_CLOBBERED_ALT -2 + /* LRA internal info about an insn (LRA internal insn representation). */ struct lra_insn_recog_data { /* The insn code. */ int icode; - /* The alternative should be used for the insn, -1 if invalid, or we - should try to use any alternative, or the insn is a debug - insn. */ + /* The alternative should be used for the insn, LRA_UNKNOWN_ALT if + unknown, or we should assume any alternative, or the insn is a + debug insn. LRA_NON_CLOBBERED_ALT means ignoring any earlier + clobbers for the insn. */ int used_insn_alternative; /* SP offset before the insn relative to one at the func start. */ poly_int64 sp_offset; diff --git a/gcc/lra-lives.c b/gcc/lra-lives.c index 2e53f877460..ddc0a9bbcc5 100644 --- a/gcc/lra-lives.c +++ b/gcc/lra-lives.c @@ -598,7 +598,9 @@ static inline bool reg_early_clobber_p (const struct lra_insn_reg *reg, int n_alt) { return (reg->early_clobber - && (n_alt < 0 || TEST_BIT (reg->early_clobber_alts, n_alt))); + && (n_alt == LRA_UNKNOWN_ALT + || (n_alt != LRA_NON_CLOBBERED_ALT + && TEST_BIT (reg->early_clobber_alts, n_alt)))); } /* Process insns of the basic block BB to update pseudo live ranges, diff --git a/gcc/lra-spills.c b/gcc/lra-spills.c index 67675d9f1c4..8f6278acae4 100644 --- a/gcc/lra-spills.c +++ b/gcc/lra-spills.c @@ -517,7 +517,7 @@ spill_pseudos (void) INSN_UID (insn)); lra_push_insn (insn); if (lra_reg_spill_p || targetm.different_addr_displacement_p ()) - lra_set_used_insn_alternative (insn, -1); + lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT); } else if (CALL_P (insn) /* Presence of any pseudo in CALL_INSN_FUNCTION_USAGE diff --git a/gcc/lra.c b/gcc/lra.c index c6feb2630bb..08de09d14dd 100644 --- a/gcc/lra.c +++ b/gcc/lra.c @@ -958,7 +958,7 @@ lra_set_insn_recog_data (rtx_insn *insn) data = XNEW (struct lra_insn_recog_data); lra_insn_recog_data[uid] = data; data->insn = insn; - data->used_insn_alternative = -1; + data->used_insn_alternative = LRA_UNKNOWN_ALT; data->icode = icode; data->regs = NULL; if (DEBUG_INSN_P (insn)) @@ -1207,7 +1207,7 @@ lra_update_insn_recog_data (rtx_insn *insn) return data; } insn_static_data = data->insn_static_data; - data->used_insn_alternative = -1; + data->used_insn_alternative = LRA_UNKNOWN_ALT; if (DEBUG_INSN_P (insn)) return data; if (data->icode < 0) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2097d800c5e..01ede00ba85 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-02-22 Vladimir Makarov + + PR target/81572 + * gcc.target/powerpc/pr81572.c: New. + 2018-02-22 Andreas Schwab * go.test/go-test.exp (go-set-goarch): Recognize riscv64-*-*. diff --git a/gcc/testsuite/gcc.target/powerpc/pr81572.c b/gcc/testsuite/gcc.target/powerpc/pr81572.c new file mode 100644 index 00000000000..de00c187d62 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr81572.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target powerpc64*-*-* } } */ +/* { dg-options "-O2 -mcpu=power7" } */ +/* { dg-final { scan-assembler-not "xxlor" } } */ + +#include + +typedef __vector unsigned char nvec_t; + +long testz_and(nvec_t a, nvec_t b) +{ + nvec_t c = vec_andc(a, b); + return vec_all_eq(a, c); +} -- 2.30.2