From 78825ca2d05357d159ecd4df31bfddf232bc53a1 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Thu, 28 Mar 2019 13:33:30 -0400 Subject: [PATCH] freedreno/ir3: align const size to vec4 This is no longer true since PIPE_CAP_PACKED_UNIFORMS was enabled. Fixes: 3c8779af325 freedreno/ir3: Enable PIPE_CAP_PACKED_UNIFORMS Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/ir3/ir3_gallium.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c index 2d9516ade5c..65fb7565de1 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c @@ -229,7 +229,11 @@ emit_user_consts(struct fd_context *ctx, const struct ir3_shader_variant *v, if (constbuf->enabled_mask & (1 << index)) { struct pipe_constant_buffer *cb = &constbuf->cb[index]; - unsigned size = align(cb->buffer_size, 4) / 4; /* size in dwords */ + /* size in dwords, aligned to vec4. (This works at least + * with mesa/st, which seems to align constant buffer to + * 16 bytes) + */ + unsigned size = align(cb->buffer_size, 16) / 4; /* in particular, with binning shader we may end up with * unused consts, ie. we could end up w/ constlen that is @@ -239,9 +243,6 @@ emit_user_consts(struct fd_context *ctx, const struct ir3_shader_variant *v, */ uint32_t max_const = MIN2(v->num_uniforms, v->constlen); - // I expect that size should be a multiple of vec4's: - assert(size == align(size, 4)); - /* and even if the start of the const buffer is before * first_immediate, the end may not be: */ -- 2.30.2